AT40K05AL Datasheet, PDF (1/4 Pages) ATMEL Corporation – 5K - 50K Gates Coprocessor FPGA with FreeRAM

Features
• Ultra High Performance
– System Speeds to 100 MHz
– Array Multipliers > 50 MHz
– 10 ns Flexible SRAM
– Internal Tri-state Capability in Each Cell
• FreeRAM^™
– Flexible, Single/Dual Port, Synchronous/Asynchronous 10 ns SRAM
– 2,048 - 18,432 Bits of Distributed SRAM Independent of Logic Cells
• 128 - 384 PCI Compliant I/Os
– Programmable Output Drive
– Fast, Flexible Array Access Facilitates Pin Locking
– Pin-compatible with XC4000, XC5200 FPGAs
• 8 Global Clocks
– Fast, Low Skew Clock Distribution
– Programmable Rising/Falling Edge Transitions
– Distributed Clock Shutdown Capability for Low Power Management
– Global Reset/Asynchronous Reset Options
– 4 Additional Dedicated PCI Clocks
• Cache Logic^® Dynamic Full/Partial Re-configurability In-System
– Unlimited Re-programmability via Serial or Parallel Modes
– Enables Adaptive Designs
– Enables Fast Vector Multiplier Updates
– QuickChange^™ Tools for Fast, Easy Design Changes
• Pin-compatible Package Options
– Plastic Leaded Chip Carriers (PLCC)
– Thin, Plastic Quad Flat Packs (LQFP, TQFP, PQFP)
• Industry-standard Design Tools
– Seamless Integration (Libraries, Interface, Full Back-annotation) with
Everest, Exemplar^™, Mentor^®, OrCAD^®, Synopsys^®, Verilog^®, Viewlogic^®,
Synplicity^®
– Timing Driven Placement & Routing
– Automatic/Interactive Multi-chip Partitioning
– Fast, Efficient Synthesis
– Over 75 Automatic Component Generators Create 1000s
of Reusable, Fully Deterministic Logic and RAM Functions
• Easy Migration to Atmel Gate Arrays for High Volume Production
• Supply Voltage 3.3V
• 5V I/O Tolerant
5K - 50K Gates
Coprocessor
FPGA with
FreeRAM^™
AT40K05AL
AT40K10AL
AT40K20AL
AT40K40AL
Summary
Rev. 2818ES–FPGA–1/04
Note: This is a summary document. A complete document is ₁
available on our web site at www.atmel.com.