AT29C040A_08 Datasheet, PDF (1/17 Pages) ATMEL Corporation – 4-megabit (512K x 8) 5-volt Only 256-byte Sector Flash Memory

Features
• Fast Read Access Time – 90 ns
• 5-volt Only Reprogramming
• Sector Program Operation
– Single Cycle Reprogram (Erase and Program)
– 2048 Sectors (256 Bytes/Sector)
– Internal Address and Data Latches for 256 Bytes
• Internal Program Control and Timer
• Hardware and Software Data Protection
• Two 16K Bytes Boot Blocks with Lockout
• Fast Sector Program Cycle Time – 10 ms
• DATA Polling for End of Program Detection
• Low Power Dissipation
– 40 mA Active Current
– 100 µA CMOS Standby Current
• Typical Endurance > 10,000 Cycles
• Single 5V ± 10% Supply
• Green (Pb/Halide-free) Packaging Option
4-megabit
(512K x 8)
5-volt Only
256-byte Sector
Flash Memory
1. Description
The AT29C040A is a 5-volt only in-system Flash Programmable and Erasable Read
Only Memory (PEROM). Its 4 megabits of memory is organized as 524,288 words by
8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS EEPROM technology,
the device offers access times up to 90 ns, and a low 220 mW power dissipation.
When the device is deselected, the CMOS standby current is less than 100 µA. The
device endurance is such that any sector can typically be written to in excess of
10,000 times. The programming algorithm is compatible with other devices in Atmel’s
5-volt only Flash family.
To allow for simple in-system reprogrammability, the AT29C040A does not require
high input voltages for programming. Five-volt-only commands determine the opera-
tion of the device. Reading data out of the device is similar to reading from an
EPROM. Reprogramming the AT29C040A is performed on a sector basis; 256 bytes
of data are loaded into the device and then simultaneously programmed.
During a reprogram cycle, the address locations and 256 bytes of data are internally
latched, freeing the address and data bus for other operations. Following the initiation
of a program cycle, the device will automatically erase the sector and then program
the latched data using an internal control timer. The end of a program cycle can be
detected by DATA polling of I/O7. Once the end of a program cycle has been
detected, a new access for a read or program can begin.
AT29C040A
0333L–FLASH–9/08