AT29C010A_08 Datasheet, PDF (1/18 Pages) ATMEL Corporation – 1-megabit (128K x 8) 5-volt Only Flash Memory

Features
• Fast Read Access Time – 70 ns
• 5-volt Only Reprogramming
• Sector Program Operation
– Single Cycle Reprogram (Erase and Program)
– 1024 Sectors (128 Bytes/Sector)
– Internal Address and Data Latches for 128 Bytes
• Two 8K Bytes Boot Blocks with Lockout
• Internal Program Control and Timer
• Hardware and Software Data Protection
• Fast Sector Program Cycle Time – 10 ms
• DATA Polling for End of Program Detection
• Low Power Dissipation
– 50 mA Active Current
– 300 µA CMOS Standby Current
• Typical Endurance > 10,000 Cycles
• Single 5V ± 10% Supply
• CMOS and TTL Compatible Inputs and Outputs
• Commercial and Industrial Temperature Ranges
• Green (Pb/Halide-free) Packaging Option
1-megabit
(128K x 8)
5-volt Only
Flash Memory
AT29C010A
1. Description
The AT29C010A is a 5-volt-only in-system Flash programmable and erasable read
only memory (PEROM). Its 1 megabit of memory is organized as 131,072 words by
8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device
offers access times to 70 ns with power dissipation of just 275 mW over the industrial
temperature range. When the device is deselected, the CMOS standby current is less
than 300 µA. The device endurance is such that any sector can typically be written to
in excess of 10,000 times.
To allow for simple in-system reprogrammability, the AT29C010A does not require
high input voltages for programming. Five-volt-only commands determine the opera-
tion of the device. Reading data out of the device is similar to reading from an
EPROM. Reprogramming the AT29C010A is performed on a sector basis; 128 bytes
of data are loaded into the device and then simultaneously programmed.
During a reprogram cycle, the address locations and 128 bytes of data are internally
latched, freeing the address and data bus for other operations. Following the initiation
of a program cycle, the device will automatically erase the sector and then program
the latched data using an internal control timer. The end of a program cycle can be
detected by DATA polling of I/O7. Once the end of a program cycle has been
detected, a new access for a read or program can begin.
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