AT25FS040 Datasheet, PDF (1/23 Pages) ATMEL Corporation – High Speed Small Sectored SPI Flash Memory

Features
• Serial Peripheral Interface (SPI) Compatible
• Supports SPI Modes 0 (0,0) and 3 (1,1)
– Datasheet describes Mode 0 Operation
• 50 MHz Clock Rate
• Byte Mode and Page Mode Program (1 to 256 Bytes) Operations
• Sector/Block/Page Architecture
– Sixteen 256 byte Pages per Sector
– Sixteen 4 Kbyte Sectors per Block
– Eight uniform 64 Kbyte Blocks
• Self-timed Sector, Block and Chip Erase
• Product Identification Mode with JEDEC Standard
• Low-voltage Operation
– 2.7V (V_CC = 2.7V to 3.6V)
• Hardware and Software Write Protection
– Device protection with Write Protect (WP) Pin
– Write Enable and Write Disable Instructions
– Software Write Protection:
Upper 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 or Entire Array
• Flexible Op Codes for Maximum Compatibility
• Self-timed Program Cycle
– 30 µs/Byte Typical
• Single Cycle Reprogramming (Erase and Program) for Status Register
• High Reliability
– Endurance: 10,000 Write Cycles Typical
• 8-lead JEDEC 150mil SOIC and 8-lead Ultra Thin Small Array Package (SAP)
High Speed
Small Sectored
SPI Flash
Memory
4M (524,288 x 8)
AT25FS040
Description
The AT25FS040 provides 4,194,304 bits of serial reprogrammable Flash memory
organized as 524,288 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation
are essential. The AT25FS040 is available in a space-saving 8-lead JEDEC SOIC and
8-lead Ultra Thin SAP packages.
Table 1. Pin Configuration
Pin Name
Function
CS
Chip Select
SCK
Serial Data Clock
SI
Serial Data Input
SO
Serial Data Output
GND
Ground
VCC
Power Supply
WP
Write Protect
HOLD
Suspends Serial
Input
8-lead JEDEC SOIC
CS 1
SO 2
WP 3
GND 4
8 VCC
7 HOLD
6 SCK
5 SI
8-lead SAP
__^V_^C_^C_ ⁸
HOLD 7
SCK 6
___
1 CS
2 _{_}S_{_}O_{_}
3 WP
SI 5
4 GND
Bottom View
Advance
Information
5107D–SFLSH–09/06