AT25128B_14 Datasheet, PDF (1/22 Pages) ATMEL Corporation – SPI Serial EEPROM

AT25128B and AT25256B
SPI Serial EEPROM
128K (16,384 x 8), 256K (32,768 x 8)
DATASHEET
Features
 Serial Peripheral Interface (SPI) Compatible
 Supports SPI Modes 0 (0,0) and 3 (1,1)
̶ Data Sheet Describes Mode 0 Operation
 Low-voltage and Standard-voltage Operation
̶ V_CC = 1.8V to 5.5V
 20MHz Clock Rate (5V)
 64-byte Page Mode and Byte Write Operation
 Block Write Protection
̶ Protect 1/4, 1/2, or Entire Array
 Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and
Software Data Protection
 Self-timed Write Cycle (5ms max)
 High Reliability
̶ Endurance: 1,000,000 Write Cycles
̶ Data Retention: 100 Years
 Green (Pb/Halogen-free/RoHS Compliant) Packaging Options
 Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers
Description
The Atmel^® AT25128B/256B provides 131,072/262,144 bits of Serial Electrically
Erasable Programmable Read-Only Memory (EEPROM) organized as
16,384/32,768 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage
operation are essential. The AT25128B/256B is available in space saving JEDEC
SOIC, TSSOP, UDFN, and VFBGA packages.
The AT25128B/256B is enabled through the Chip Select pin (CS) and accessed
via a 3-Wire interface consisting of Serial Data Input (SI), Serial Data Output (SO),
and Serial Clock (SCK). All programming cycles are completely self-timed, and no
separate erase cycle is required before write.
Block Write protection is enabled by programming the status register with one of
four blocks of Write Protection. Separate Program Enable and Program Disable
instructions are provided for additional data protection. Hardware Data Protection
is provided via the WP pin to protect against inadvertent write attempts. The
HOLD pin may be used to suspend any serial communication without resetting the
serial sequence.
Atmel-8698D-SEEPROM-AT25128B-256B-Datasheet_072014