AT24C512B_08 Datasheet, PDF (1/26 Pages) ATMEL Corporation – Two-wire Serial EEPROM 512K (65,536 x 8)

Features
• Low-voltage and Standard-voltage Operation
– 1.8v (V_CC = 1.8V to 3.6V)
– 2.5v (V_CC = 2.5V to 5.5V)
• Internally Organized 65,536 x 8
• Two-wire Serial Interface
• Schmitt Triggers, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 1 MHz (2.5V, 5.5V), 400 kHz (1.8V) Compatibility
• Write Protect Pin for Hardware and Software Data Protection
• 128-byte Page Write Mode (Partial Page Writes Allowed)
• Self-timed Write Cycle (5 ms Max)
• High Reliability
– Endurance: 1,000,000 Write Cycles
– Data Retention: 40 Years
• Lead-free/Halogen-free Devices
• 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-ball dBGA2, and
8-lead Ultra Thin Small Array (SAP) Packages
• Die Sales: Wafer Form, Waffle Pack and Bumped Die
Two-wire Serial
EEPROM
512K (65,536 x 8)
AT24C512B
with Three Device Address Inputs
Description
The AT24C512B provides 524,288 bits of serial electrically erasable and programma-
ble read only memory (EEPROM) organized as 65,536 words of 8 bits each. The
device’s cascadable feature allows up to eight devices to share a common two-wire
bus. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operation are essential. The devices are available
in space-saving 8-pin PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP,
8-ball dBGA2 and 8-lead Ultra Thin SAP packages. In addition, the entire family is
available in 1.8V (1.8V to 3.6V) and 2.5V (2.5V to 5.5V) versions.
Table 0-1.
Pin Name
A0–A2
SDA
SCL
WP
Pin Configurations
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
8-lead TSSOP
A0 1
A1 2
A2 3
GND 4
8 VCC
7 WP
6 SCL
5 SDA
8-lead PDIP
A0 1
A1 2
A2 3
GND 4
8 VCC
7 WP
6 SCL
5 SDA
8-ball dBGA2
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 A2
4 GND
Bottom View
8-lead Ultra Thin SAP
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 A2
4 GND
Bottom View
8-lead SOIC
A0 1
A1 2
A2 3
GND 4
8 VCC
7 WP
6 SCL
5 SDA
Rev. 5297A–SEEPR–1/08