ATH10T05 Datasheet, PDF (1/14 Pages) Astec America, Inc – 10-A, 5-V Input Non-Isolated Wide-Output Adjust Power Module

ATH10T05 Series —5-V Input
10-A, 5-V Input Non-Isolated
Wide-Output Adjust Power Module
REVISION 00 (4DEC2003)
NOMINAL SIZE =
1 in x 0.62 in
(25,4 mm x 15,75 mm)
Features
• Up to 10-A Output Current
• 5-V Input Voltage
• Wide-Output Voltage Adjust
(0.8 V to 3.6 V)
• Efficiencies up to 96 %
• 150 W/in³ Power Density
• On/Off Inhibit
• Output Voltage Sense
• Pre-Bias Startup
• Margin Up/Down Controls
• Under-Voltage Lockout
• Auto-Track™ Sequencing
• Output Over-Current Protection
(Non-Latching, Auto-Reset)
• Operating Temp: –40 to +85 °C
• DSP Compatible Output Voltages
• IPC Lead Free 2
• Safety Agency Approvals (Pending)
UL 1950, CSA 22.2 950, &
EN60950
• Point-of-Load Alliance (POLA)
Compatible
Description
The ATH10T05 series non-isolated
power module is small in size but big on
performance and flexibility. Its high out-
put current, compact footprint, and
industry-leading features offers system
designers a versatile module for powering
complex multi-processor digital systems.
This product employs double-sided
surface mount construction and provides
high-performance step-down power
conversion for up to 10 A of output cur-
rent from a 5-V input bus voltage. The
output voltage is adjustable and can be set
to any value over the range, 0.8 V to 3.6 V,
using a single resistor.
This series includes Auto-Track™
Sequencing. Auto-Track simplifies the
task of supply voltage sequencing in a
power system by enabling modules to
track each other, or any external voltage,
during power up and power down.
Other operating features include an
on/off inhibit, margin up/down controls,
and the ability to start up into an existing
output voltage or prebias. To ensure tight
load regulation, an output voltage sense
is also provided. A non-latching over-
current trip serves as load fault protection.
Target applications include complex
multi-voltage, multi-processor systems
that incorporate the industry’s high-speed
DSPs, micro-processors and bus drivers.
Pin Configuration
Pin Function
1 GND
2 Vin
3 Inhibit *
4 V_o Adjust
5 Vo Sense
6 Vout
7 GND
8 Track
9 Margin Down *
10 Margin Up *
* Denotes negative logic:
Open = Normal operation
Ground = Function active
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Standard Application
Track
Margin Down
Margin Up
V_IN
Inhibit
GND
10 9 8
1
7
AT^PH^T1^H0⁰T⁵⁰0⁶5⁰-9^WS
(Top View)
2
6
34 5
V_o Sense
C_IN
330 µF
(Required)
R_SET
1 %, 0.1 W
(Required)
Rset = Resistor to set the desired output
voltage (see spec. table for values)
Cin = Required 330 µF capacitor
Cout = Optional 330 µF capacitor
V_OUT
L
C_OUT
O
330 µF
A
(Optional) ^D
GND
North America (USA): 1-888-41-ASTEC
Europe (UK): 44(1384)842-211
Asia (HK): 852-2437-9662