AX88772A Datasheet, PDF (9/45 Pages) ASIX Electronics Corporation – USB 2.0 to 10/100M Fast Ethernet Controller

AX88772A/AX88172A
Low-pin-count
USB 2.0 to 10/100M Fast Ethernet Controller
1.0 Introduction
1.1 General Description
The AX88772A/AX88172A Low-pin-count USB 2.0 to 10/100M Fast Ethernet controller is a high performance and
highly integrated ASIC which enables low cost, small form factor, and simple plug-and-play Fast Ethernet network
connection capability for desktops, notebook PC’s, Ultra-Mobile PC’s, docking stations, game consoles, digital-home
appliances, and any embedded system using a standard USB port.
The AX88772A/AX88172A features a USB interface to communicate with a USB Host Controller and is compliant with
USB specification V1.1 and V2.0. The AX88772A/AX88172A implements a 10/100Mbps Ethernet LAN function based
on IEEE802.3, and IEEE802.3u standards with 24KB of embedded SRAM for packet buffering. The
AX88772A/AX88172A integrates an on-chip 10/100Mbps Ethernet PHY to simplify system design.
The AX88172A provides an optional External Media Interface (EMI) for external PHY or external MAC for different
application purposes. The EMI can be a media-independent interface (MII) for implementing 100BASE-FX Ethernet or
HomePNA functions. The EMI can also be a Reverse-MII or Reverse Reduced-MII (Reverse-RMII) for glueless
MAC-to-MAC connections to any MCU with Ethernet MAC MII or RMII interface. In addition, the EMI can be
configured to Dual-PHY mode allowing AX88172A to act as an Ethernet PHY or USB 2.0 PHY for external MAC device
that needs Ethernet and USB interfaces in their system applications. The optional serial interface such as I2C, SPI, and
UART are provided as a control channel from the USB Host Controller to communicate with the external MCU chip.
The AX88772A/AX88172A needs 12MHz clock for USB operation and 25Mhz clock for Fast Ethernet operation. The
AX88772A is housed in the 64-pin LQFP and the AX88172A is housed in the 80-pin TQFP RoHS compliant package.
1.2 Block Diagram
EECS
EECK
EEDIO
GPIO_2~0
SI_3~0
24KB SRAM
SEEPROM
Loader I/F
General Purpose
I/O
Serial I/F
Controller:
UART/I2C/SPI
3.3 to 1.8V
Regulator
Memory
Arbiter
MAC
Core
10/100M
Ethernet
PHY
USB to
Ethernet
Bridge
PHY/MAC
mode Bridge
STA
USB Core and Interfaces
PLL Clock
Generators
Power-On-Reset
& Reset Gen.
RXIP/RXIN
TXOP/TXON
AX88172A only
External Media Interface
MII /
Reverse-MII /
Reverse-RMII
MDC / MDIO
XTL25P, XTL25N
DP/DM
XTL12P, XTL12N
RESET_N
Figure 7 : AX88772A/AX88172A Block Diagram
9
ASIX ELECTRONICS CORPORATION