AX88872P Datasheet, PDF (11/36 Pages) ASIX Electronics Corporation – 10/100BASE Dual Speed “Swipeater” Controller

CONFIDENTIAL
AX88872P Swipeater Controller PRELIMINARY
2.3 Expansion Bus Interface for 100 Mbps
Signal Name Type Pin No.
Description
HIRD[3:0]
I/O/Z 156, 155 INTER REPEATER DATA : Nibble data input/output. Transfer data from
/PU 154, 153 the “active” AX88872/3 to all other “inactive” AX88872/3 chips. The bus-
master of the IRD bus is determined by IR_ACT bus arbitration.
/HIRD_V
I/O/Z
/PU
152 INTER REPEATER DATA VALID : This signal reflects the RX_DV
status of the active port. Used to frame good packets.
HIRD_CK
I/O/Z
/PU
151 INTER REPEATER CLOCK VALID : All inter repeater signals are
synchronized to the rising edge of this clock.
HIRD_ODIR
O
150 INTER REPEATER DATA IN/OUT DIRECTION :
This pin indicates the direction of IRD data .
“High” = HIRD[3:0], /HIRD_V , HIRD_CK are Output.
“Low” = HIRD[3:0], /HIRD_V , HIRD_CK are Input.
/LHIR_ACT[2:0] I/O/OC 128, 126 LOCAL REPEATER ACTIVITY IN/OUT : the function is the same as
125 /HIR_ACTO[3:0] but for local repeater activity only.
/HIR_ACTI[3:0]
I/PU 132, 131 INTER REPEATER ACTIVITY IN: These pins perform the same
130, 129 function as /HIR_ACTO[3:0] when they serve as input function. Then the
/HIR_ACTO[3:0] insert external buffers the input function must be replaced
with /HIR_ACTI [3:0].
/HIR_ACTO[3:0] I/O/OC 148, 147 INTER REPEATER ACTIVITY IN/OUT: The local repeater activity
146, 145 appearance, the signal of the related RID (Repeater ID) will be asserted and
as an output pin. All other pins serve as input pins but except the collision
conditions. When collision occurs , the signal of related (RID-1) pins will
also serve as outputs and will active during local collision period. The
exception case is when RID = 0, then (RID-1) is replaced with (RID+1).
2.4 Expansion Bus Interface for 10 Mbps
Signal Name Type Pin No.
Description
TIRD[3:0]
I/O/Z 106, 105 INTER REPEATER DATA : Nibble data input/output. Transfer data from
/PU 103, 102 the “active” AX88872/3 to all other “inactive” AX88872/3 chips. The bus-
master of the IRD bus is determined by IR_ACT bus arbitration.
/TIRD_V
I/O/Z
/PU
100 INTER REPEATER DATA VALID : This signal reflects the RX_DV
status of the active port. Used to frame good packets.
TIRD_CK
I/O/Z
/PU
99 INTER REPEATER CLOCK VALID : All inter repeater signals are
synchronized to the rising edge of this clock.
TIRD_ODIR
O
95 INTER REPEATER DATA IN/OUT DIRECTION :
This pin indicates the direction of data for external transceiver.
“High” = TIRD[3:0], /TIRD_V , TIRD_CK are Output.
“Low” = TIRD[3:0], /TIRD_V , TIRD_CK are Input.
/LTIR_ACT[2:0] I/O/OC 109, 108 LOCAL REPEATER ACTIVITY IN/OUT : the function is the same as
107 /TIR_ACTO[3:0] but for local repeater activity only.
/TIR_ACTI[3:0]
I/PU 119, 118 INTER REPEATER ACTIVITY IN: These pins perform the same
117, 116 function as /HIR_ACTO[3:0] when they serve as input function. Then the
/HIR_ACTO[3:0] insert external buffers the input function must be replaced
with /HIR_ACTI [3:0].
/TIR_ACTO[3:0]
I/O/OC 124, 123 INTER REPEATER ACTIVITY IN/OUT: The local repeater activity
121,120 appearance, the signal of the related RID (Repeater ID) will be asserted and
as an output pin. All other pins serve as input pins but except the collision
conditions. When collision occurs , the signal of related (RID-1) pins will
also serve as outputs and will active during local collision period. The
exception case is when RID = 0, then (RID-1) is replaced with (RID+1).
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ASIX ELECTRONICS CORPORATION