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ALN1883T2 Datasheet, PDF (4/4 Pages) Advanced Semiconductor Business Inc. – Internally Matched LNA Module
plerowTM ALN1883T2
Internally Matched LNA Module
Application Circuit
C1
IN
VS
+-
Tantal or MLC (Multi Layer Ceramic)
Capacitor
C2
ALN
OUT
1) The tantal or MLC (Multi Layer Ceramic) capacitor is optional and for bypassing the AC noise introduced
from the DC supply. The capacitance value may be determined by customer’s DC supply status. The ca-
pacitor should be placed as close as possible to Vs pin and be connected directly to the ground plane for
the best electrical performance.
2) DC blocking capacitors are always necessarily placed at the input and output port for allowing only the
RF signal to pass and blocking the DC component in the signal. The DC blocking capacitors are includ-
ed inside the ALN module. Therefore, C1 & C2 capacitors may not be necessary, but can be added just
in case that the customer wants. The value of C1 & C2 is determined by considering the application fre-
quency.
Recommended Soldering Reflow Process
260°C
20~40 sec
Evaluation Board Layout
Vs
Ramp-up
(3˚C/sec)
IN
OUT
Ramp-down
200°C
(6°C/sec)
150°C
60~180 sec
Size 25x25mm
(for ALN-AT, BT, T Series – 10x10mm)
4/4
www.asb.co.kr
June 2009