APLR1984_13 Datasheet, PDF (1/1 Pages) Advanced Semiconductor Business Inc. – PLL Synthesizer Module

plerow^TM APLR1984
PLL Synthesizer Module
Features
· +3 dBm Output Level at 1984 MHz
· Channel Step Size : 50 kHz
· 2^nd Harmonic : < -20 dBc
· Spurious Level : < -65 dBc
· Lock Time : < 30 ms
· 50 mA Current Consumption
Specifications
Description
The plerow^TM PLL synthesizer module was
designed for use in wireless and wireline
systems in a wide range of frequency from
50 MHz to 6 GHz. ASB’s PLL provides ex-
ceptionally low spurious and phase noise
performance with fast locking time and low
current consumption. All products are avail-
able in a surface-mount type package.
Parameter
Frequency Range
Output Power
Supply Voltage
Current Consumption
Channel Step Size
2^nd Harmonics
Spurious Level
Lock Time
Reference Frequency
Reference Input Level
Phase Noise (C / N)
@ 1 kHz
@ 10 kHz
@ 100 kHz
Output Impedance
Operating Temp. Range
Package Type & Size
Unit
MHz
dBm
V
mA
kHz
dBc
dBc
ms
MHz
dBm
dBc/Hz

C
mm
Min.
1945
+1
4.75
-5
Typical
1984
+3
5
50
10
10
Max.
2023
5.25
50
-20
-65
30
+5
-
-
-100
-95
-120
-115
50
-30
25
80
SMT, 15.3W15.3L3.2H
1) Measurement conditions are as follows: T = 25C, VCC = 5 V, Freq. = 1984 MHz, 50 ohm system.
Outline Drawing
More Information
Website: www.asb.co.kr
E-mail: [e-mail]
Tel: [phone]
Fax: [phone]
ASB Inc., 4th Fl. Venture Town
Bldg., 367-17 Goijeong-Dong,
Seo-Gu, Daejon 302-716, Korea
APLR-
0000
ASB Inc.
1/1
www.asb.co.kr
June 2010