DS760SL-3 Datasheet, PDF (4/7 Pages) Artesyn Technologies – 760 Watts Bulk Front End

DS760SL Series Data Sheet
Outputs - All Models
Turn On/Off Timing
Item
Description
Min
Tvout_rise
+12 Output rise time
10
Tvout_rise
5.0 Vsb output rise time
1
Tsb_on_delay
Delay from AC being applied to 5.0 Vsb being within regulation.
Tac_on_delay
Delay from AC being applied to all output voltages being within regulation.
Tvout_holdup
Time all output voltages, including 5.0 Vsb, stay within regulation after loss of AC.
12
Tpwok_holdup
Delay from loss of AC to de-assertion of PWOK
5
Tpson_on_delay Delay from PSON# active to output voltages within regulation limits.
50
Tpson_pwok
Delay from PSON# de-active to PWOK being de-asserted.
Tacok_delay
Delay from loss of AC input to de-assertion of ACOK#.
10
Tpwok_on
Delay from output voltages within regulation limits to PWOK asserted at turn on.
100
Tpwok_off
Delay from PWOK de-asserted to 12 Vdc or 5.0 Vsb dropping out of regulation limits.
1
Tpwok_low
Duration of PWOK being in the de-asserted state during an off/on cycle using AC or the PSON# signal.
100
Tsb_vout
Delay from 5.0 Vsb being in regulation to 12 Vdc being in regulation at AC turn on.
50
Max
300
50
1500
3000
2500
100
1000
1000
1000
Units
mSec
mSec
mSec
mSec
mSec
mSec
mSec
mSec
mSec
mSec
mSec
mSec
mSec
PSON #
The PSON# signal is required to remotely turn on/off the power
supply. PSON# is an active low signal that turns on the +12 Vdc
power rail. When this signal is not pulled low by the system, or left
open, the +12 Vdc output turns off. The 5.0 Vsb output remains
on. This signal is pulled to a standby voltage by a pull-up resistor
internal to the power supply. The power supply fan(s) shall operate
at the lowest speed.
PWOK# (POWER GOOD)
PPWOK is a power good signal and will assert HIGH when the
outputs are within the regulation limits. PWOK will be pulled LOW
by the power supply to indicate when either output falls below
regulation limits or when AC power has been removed for a time
sufficiently long so that power supply operation is no longer guaran-
teed. The start of the PWOK# delay time shall be inhibited as long
as the +12 Vdc output is in current limit or the 5.0 Vsb output is
below the regulation limit.
PSON Signal Characteristics
Signal Type
PSON# = Low
PSON# = Open
Logic level low (power supply ON)
Logic level high (power supply OFF)
Source current, Vpson = low
Power up delay: Tpson_on_delay
Accepts an open collector/drain
input from the system. Pulled-up
to the 5.0 Vsb located in power
supply.
ON
OFF
MIN
MAX
0V
0.8 V
2.0 V
4.125 V
4 mA
5 msec
200 msec
PWOK Signal Characteristics
Signal Type
PWOK = High
PWOK = Low
To tLogic level low voltage, Ising = 4 mA
Logic level high voltage, Isource = 200 µA
Sink current, PWOK = low
Source current, PWOK = high
Open collector/drain output
from power supply. Pullup to
5.0 Vsb external to the power
supply.
Power Good
Power Not Good
MIN
MAX
0V
0.8 V
2.0 V
4.125 V
4 mA
2 mA