AP89010_15 Datasheet, PDF (10/18 Pages) Aplus Intergrated Circuits – APLUS INTEGRATED CIRCUITS INC

Integrated Circuits Inc.
TRIGGER MODES
aP89021/010
There are two triggering modes available for aP89021/010.
Key or CPU Trigger modes are determined by setting the EPORM programmable options during voice
data compilation.
Key Trigger Mode
With this trigger mode, up to 12 Voice Groups are triggered by setting S1 to S4 to HIGH or NC (not
connected) in different combinations. Each Voice Group can have its only independent trigger
options (See Fig. 4, 5, 7 and 8 for trigger options definition).
Voice Groups can also be triggered sequentially by setting SBT pin to HIGH.
CPU Parallel Trigger Mode
In this mode, S1 to S4 are set to HIGH or LOW according to the table on the following page and
followed by setting the SBT input pin to HIGH, the corresponding Voice Group will be triggered.
Trigger options defined in Fig. 4, 5, 7 and 8 are valid for this mode.
Fig. 11 CPU Parallel Trigger Mode
Note that SBT pin cannot be used as Single Button Sequential trigger in this mode. In stead, it acts as
a Strobe input to clock-in the data input from S1 to S4 into the chip.
Ver 4.0
10
Aug 23, 2010