SA60 Datasheet, PDF (4/4 Pages) Cirrus Logic – H-BRIDGE MOTOR DRIVER/AMPLIFIERS

OPERATING
CONSIDERATIONS
SA60
GENERAL
Please read Application Note 30 on "PWM Basics". Refer
to Application Note 1 "General Operating Considerations" for
helpful information regarding power supplies, heat sinking and
mounting. Visit www.apexmicrotech.com for design tools that
help automate pwm filter design; heat sink selection; Apex’s
complete Application Notes library; Technical Seminar Work-
book; and Evaluation Kits.
PWM OSCILLATOR – INTERNAL OR EXTERNAL
The SA60 contains an internal PWM oscillator whose
frequency is determined by an external capacitor connected
between pin 1 and pin 2. Maximum frequency is 125 kHz.
The user may also disregard the internal PWM oscillator and
supply the SA60 with an external TTL pulse generator up to
250KHZ.
PIN DESCRIPTION
VCC - is the low voltage supply for powering internal logic and
drivers for the lowside and highside MOSFETS. The supplies
for the highside drivers are derived from this voltage.
V_S - is the higher voltage H-bridge supply. The MOSFETS
obtain the output current from this supply pin. The voltage on
this pin is limited to +80V by the drive IC. The MOSFETS are
rated at 100 volts.
ISENSE A AND B - These are tied to power gnd directly or
through sense resistors.
ANALOG GND - is the reference for the internal PWM
oscillator. Connect this pin to pin 6. Connect low side of Vcc
supply and any other supply used to generate analog input
signals to ANALOG GND.
ANALOG INPUT - is an analog input for controlling the
PWM pulse width of the bridge. A voltage higher than Vcc/2
will produce greater than 50% duty cycle pulses out of B OUT.
A voltage lower than Vcc/2 will produce greater than 50% duty
cycle pulses out of A OUT. If using in the digital mode, bias
this point at 1/2 the logic high level.
DISABLE - Is the connection for disabling all 4 output
switches. DISABLE high overrides all other inputs. When taken
low, everything functions normally. An internal pullup to Vcc
will keep DISABLE high if pin left open.
PWM INPUT - Is the TTL compatible digital input for control-
ling the PWM pulse width of the bridge. A duty cycle greater
than 50% will produce greater than 50% duty cycle pulses out
of the A out. A duty cycle less than 50% will produce greater
than 50% duty cycle from the B out. For analog inputs, the
integration capacitor for the internal clock must be connected
between this pin and analog ground. The internal switching
frequency is programmable up to 125 kHz by selection of the
integration capacitor. The formula is:
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BYPASSING
Adequate bypassing of the power supplies is required for
proper operation. Failure to do so can cause erratic and low
efficiency operation as well as excessive ringing at the out-
puts. The Vs supply should be bypassed with at least a 1µF
ceramic capacitor in parallel with another low ESR capacitor
of at least 10µF per amp of output current. Capacitor types
rated for switching applications are the only types that should
be considered. The 1µF ceramic capacitor must be physically
connected directly to the Vs and POWER GND pins. Even one
inch of lead length will cause excessive ringing at the outputs.
This is due to the very fast switching times and the inductance
of the lead connection. The bypassing requirements of the Vcc
supply are less stringent, but still necessary. A .1µF to .47µF
ceramic capacitor connected directly to the Vcc and ANALOG
GND pins will suffice.
PCB LAYOUT
The designer needs to appreciate that the SA60 combines
in one circuit both high speed high power switching and low
level analog signals. Certain layout rules of thumb must be
considered when a circuit board layout is designed using the
SA60:
1. Bypassing of the power supplies is critical. Capacitors
must be connected directly to the power supply pins with
very short lead lengths (well under 1 inch). Ceramic chip
capacitors are best.
2. Connect ANALOG GND to POWER GND with a conductor
having no intermediate connections. Connect all Vs power
supply, filter and load related ground connections to POWER
GND keeping these conductors separate until reaching pin
6. Connect all Vcc power supply and input signal related
ground connections to ANALOG GND keeping conductors
separate until reaching pin 1. Do not allow ground loops to
form by making additional ground connections at the low
side of the physical power supplies. If ground plane is used
do not allow more than 1mA to flow through it.
3. Beware of capacitive coupling between output connections
and signal inputs through the parasitic capacitance between
layers in multilayer PCB designs.
4. Do not run small signal traces between the pins of the output
section (pins 8-12).
CURRENT SENSE
There are two load current sensing pins, I SENSE A and I
SENSE B. The two pins can be shorted to POWER GND in
the voltage mode connection but both must be used in the
current mode connection. It is recommended that R SENSE
resistors be non-inductive. Load current flows in the I SENSE
pins. The SA60 has no internal current limit.
TRANSIENT SUPPRESSION
An RC Network of A 100 PF Capacitor and a one ohm resis-
tor is required as shown in the external connection diagram on
page 1. This network assures proper operation under various
loads. Minimal power is dissipated in the resistor.
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SA60U REV J OCTOBER 2004 © 2004 Apex Microtechnology Corp.