SA50CE Datasheet, PDF (4/4 Pages) Cirrus Logic – H-BRIDGE MOTOR DRIVER/AMPLIFERS

OPERATING
CONSIDERATIONS
SA50CE
GENERAL
Please read Application Note 30 on "PWM Basics". Refer
to Application Note 1 "General Operating Considerations" for
helpful information regarding power supplies, heat sinking
and mounting. Visit www.apexmicrotech.com for design tools
that help automate pwm filter design and heat sink selection.
The "Application Notes" and "Technical Seminar" sections
contain a wealth of information on specific types of applica-
tions. Information on package outlines, heat sinks, mounting
hardware and other accessories are located in the "Packages
and Accessories" section. Evaluation Kits are available for most
Apex product models, consult the "Evaluation Kit" section for
details. For the most current version of all Apex product data
sheets, visit www.apexmicrotech.com.
PIN DESCRIPTION
V_CC - is the low voltage supply for powering internal logic and
drivers for the lowside and highside MOSFETS. The
supplies for the highside drivers are derived from this
voltage.
V_S - is the higher voltage H-bridge supply. The MOSFETS
obtain the output current from this supply pin. Proper
by-passing to GND with sufficient capacitance to sup-
press any voltage transients, and to ensure removing
any drooping during switching, should be done as close
to the pins on the hybrid as possible.
A OUT - is the output pin for one half of the bridge. Increas-
ing the input voltage causes increasing duty cycle at
this output.
B OUT - is the output pin for the other half of the bridge.
Decreasing the input voltage causes increasing duty
cycles at this point.
RSENSE A - This is the connection for the bottom of the A
half bridge. This can have a sense resistor connected
to the V_S return ground for current limit sensing, or can
be connected directly to ground. The maximum voltage
on this pin is ±2 volts with respect to GND.
GND - is the return connection for the input logic and V_CC.
RSENSE B - This is the connection for the bottom of the B
half bridge. This can have a sense resistor connection
to the V_S return ground for current limit sensing, or can
be connected directly to ground. The maximum voltage
on this pin is ±2 volts with respect to GND.
INPUT - is an analog input for controlling the PWM pulse width
of the bridge. A voltage higher than V_CC /2 will produce
greater than 50% duty cycle pulses out of A OUT. A
voltage lower than V_CC /2 will produce greater than 50%
duty cycle pulses out of B OUT.
TYPICAL SYSTEM OPERATION
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This is a diagram of a typical application of the SA50CE.
The design Vcc voltage is +12 volts. V_CC is internally bypassed
with a good low ESR ceramic capacitor. A higher ESR bulk
capacitor, such as a tantalum electrolytic, may be used ex-
ternally in parallel. The analog input can be an analog speed
control voltage from a potentiometer, other analog circuitry or
by microprocessor and a D/A converter. This analog input gets
pulled by the current control circuitry in the proper direction to
reduce the current flow in the bridge if it gets too high. The gain
of the current control amplifier will have to be set to obtain the
proper amount of current limiting required by the system.
Current sensing is done in this case by a 0.1Ω sense resistor
to sense the current from both legs of the bridge separately. It
is important to make the high current traces as big as possible
to keep inductance down. The storage capacitor connected to
the V_S and the hybrid GND should be large enough to provide
the high energy pulse without the voltage sagging too far. A
low ESR capacitor will be required. Mount capacitor as close
to the hybrid as possible. The connection between GND and
the V_S return should not be carrying any motor current. The
sense resistor signal is common mode filtered as necessary
to feed the limiting circuitry. This application will allow full four
quadrant torque control for a closed loop servo system.
A snubber network is usually required, due to the inductance
in the power loop. It is important to design the snubber network
to suppress any positive spikes above +V_S and negative spikes
below –2V with respect to pin 7 (GND).
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SA50CEU REV A FEBRUARY 2007  © 2007 Apex Microtechnology Corp.