SA305_07 Datasheet, PDF (3/8 Pages) Cirrus Logic – PULSE WIDTH MODULATION AMPLIFIER

PIN
DESCRIPTIONS
SA305
Pin Descriptions
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Pin # Pin name
10,21 Vs
17 Vdd
22 OutA
13 OutB
2 OutC
1,23 PGND
11 SGND
19 DISABLE
18 Warning
8 FAULT





16 PWM_HA
15 PWM_LA
12 PWM_HB
14 PWM_LB
7 PWM_HC
5 PWM_LC
20 IMON_A
3 IMON_B
4 IMON_C
9 OFF
Description
High voltage supply (12V-60V)
Logic supply (5V)
Half bridge output
Half bridge output
Half bridge output
Power ground, high current ground return path of the bridge outputs
Analog and logic circuits ground
Disable logic Input, CMOS. When high disables all six output MOSFETs and makes the FAULT output high.
Do not leave floating at any time.
Output pin goes high if Tj rises above 135°C and goes low again if T_J falls below 85°C.
The output pin is high under the following conditions:
a) Short-Circuit and Over Current condition.
b) When T_J rises above 160°C until it falls below 110°C.
c) When V_S rises above 9.8V until it falls below 9.7V.
d) Disable pin is activated (pulled high)
This can be used as an interrupt to the microcontroller.
CMOS logic input: When HIGH, indicates the Pchannel of output A is to be turned on.
CMOS logic input: When HIGH, indicates the Nchannel of output A is to be turned on.
CMOS logic input: When HIGH, indicates the Pchannel of output B is to be turned on.
CMOS logic input: When HIGH, indicates the Nchannel of output B is to be turned on.
CMOS logic input: When HIGH, indicates the Pchannel of output C is to be turned on.
CMOS logic input: When HIGH, indicates the Nchannel of output C is to be turned on.
Current monitor output, approximate current 1/4100 of Phase A current
Current monitor output, approximate current 1/3500 of Phase B current
Current monitor output, approximate current 1/3800 of Phase C current
I/O Pin. Disables all Fault Mechanisms (except under voltage lockout) when pulled LOW. Can be used as a
latched fault output but does not indicate undervoltage lockout. Leave this pin floating for normal operation.
Do not pull HIGH.
All inputs are CMOS levels. Inputs can accept CMOS levels as low as 3.3 volts. CMOS logic inputs cannot be left floating
at any time.
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