EP7312-90 Datasheet, PDF (3/4 Pages) Cirrus Logic – Allows Faster than Real-Time Recording

EP7312-90
Overview
Power Management
The EP7312-90 is designed for ultra-low power operation. Its
core operates at only 2.5 V, while I/O has an operational range
of 2.5 V to 3.3 V. The device has three basic power states:
Operating—This state is the full performance state. All the
clocks and peripheral logic are enabled.
Idle—This state is the same as the Operating State,
except the CPU clock is halted while waiting for an event
such as a key press.
Standby—This state is equivalent to the computer being
switched off (no display) and the main oscillator shut
down. An event such as a key press can wake-up the
processor.
MaverickKey™ Unique ID
MaverickKey unique hardware programmed IDs are a solution
the growing concern over secure web content and commerce.
With Internet security playing an important role in the delivery
of digital media such as books or music, traditional software
methods are quickly becoming unreliable. The MaverickKey
unique IDs provide OEMs with a method of utilizing specific
hardware IDs such as those assigned for DRM (Digital Right
Management) or any other authentication mechanism.
Both a specific 32-bit ID as well as a 128-bit random ID is
programmed into the EP7312-90 through the use of laser
probing technology. These IDs can then be used to match
secure copyrighted content with the ID of the target device the
EP7312-90 is powering, and then deliver the copyrighted
information over a secure connection. In addition, secure
transactions can benefit by also matching device IDs to server
IDs. MaverickKey IDs provide a level of hardware security
required for today’s Internet appliances.
Memory Interfaces
There are two main external memory interfaces. The first is the
ROM/SRAM/FLASH-style interface that has programmable
wait-state timings and includes burst-mode capability, with
eight chip selects decoding six 256 Mbyte sections of
addressable space. For maximum flexibility, each bank can be
specified to be 8, 16, or 32-bits wide. This allows the use of 8-
bit wide boot ROM options to minimize system memory
requirements and cost, the ARM Thumb instruction set is
supported providing for the use of high-speed 32-nbit
operations in 16-bit op-codes and yielding industry-leading
code density.
The second is the programmable 4 or 32-bit-wide SDRAM
interface that allows direct connection of up to two banks of
SDRAM, each bank containing up to 256 Mbits. To assure the
lowest possible power consumption, the EP7312 supports
self-refresh DRAMs, which are placed in a low-power Standby
State.
A DMA address generator is also provided that fetches video
display data for the LCD controller from main SDRAM
memory. The display frame buffer start address is
programmable. In addition, the built-in LCD controller can
utilize external or internal SRAM for memory, thus eliminating
the need for SDRAMs.
Digital Audio Capability
The EP7312-90 includes its powerful 32-bit RISC processing
engine to implement audio decompression algorithms in
software. The nature of the on-board RISC processor and the
availability of efficient C-compilers and other software
development tools ensures that a wide range of audio
decompression algorithms can easily be ported to and run on
the EP7312-90.
Serial Interfaces
The EP7312-90 includes two 16550-type UARTs for RS-232
serial communications, both of which have two 16-byte FIFOs
for receiving and transmitting data. The UARTs support bit
rates up to 115.2 kbits/s. An IrDA SIR protocol
encoder/decoder can be optionally switched into the RX/TX
signals to drive an infrared communication interface directly.
Improved Digital Audio Interface (DAI)
The EP7312-90 integrates an interface to enable a direct
connection to many low cost, low power, high quality audio
converters. In particular, the DAI can directly interface with the
Cirrus CS43L41/42/43 low-power audio DACs and CS55L32
low-power ADC. Among the features for these devices are:
digital bass and treble boost, digital volume control, and
compressor-limiter functions.
Packaging
The EP7312-90 is available in a 208-pin LQFP package and a
256-ball PBGA package.
System Design
As shown in the system block diagram (page 4), simply adding
desired memory and peripherals to the highly integrated
EP7312-90 completes a low-power system solution. All
necessary interface logic is integrated on-chip.
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