AOZ1017 Datasheet, PDF (12/16 Pages) Alpha & Omega Semiconductors – EZBuck™ 3A Simple Regulator

AOZ1017
The maximum junction temperature of AOZ1017 is
150°C, which limits the maximum load current capability.
Please see the thermal de-rating curves for maximum
load current of the AOZ1017 under different ambient
temperatures.
The thermal performance of the AOZ1017 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC
will operate under the recommended environmental
conditions.
Several layout tips are listed below for the best electric
and thermal performance. Figure 3 illustrates a PCB
layout example as reference.
1. Do not use thermal relief connection to the V_IN and
the PGND pin. Maximize the copper area for the
PGND pin and the V_IN pin to help thermal dissipation.
2. Input capacitor should be connected as close as
possible to the V_IN pin and the PGND pin.
3. A ground plane is preferred. If a ground plane is not
used, separate PGND from AGND and connect
them only at one point to avoid the PGND pin noise
coupling to the AGND pin.
4. Make the current trace from LX pins to L to C_O to the
PGND as short as possible.
5. Pour copper plane on all unused board area and
connect it to stable DC nodes, like V_IN, GND or V_OUT.
6. The two LX pins are connected to the internal PFET
drain. They are low resistance thermal conduction
path and most noisy switching node. Connecting a
copper plane to the LX pins will help thermal
dissipation. This copper plane should not be too
larger otherwise switching noise may be coupled to
other part of circuit.
7. Keep sensitive signal traces away from the LX pins.
L
VIN ₁
8 LX
Cin
PGND 2 _SO-8 7 LX
AGND 3
6 EN
Cout
FB ₄
5 ^COMP
CC ^RC
Figure 3. AOZ1017 PCB Layout
Rev. 1.0 July 2007
www.aosmd.com
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