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AOZ1014DI_09 Datasheet, PDF (12/19 Pages) Alpha & Omega Semiconductors – EZBuck™ 5A Simple Buck Regulator
AOZ1014
The zero given by the external compensation network,
capacitor CC and resistor RC ,is located at:
fZ2 = -2---π-----×-----C---1-C-----×-----R-----C--
To design the compensation circuit, a target crossover
frequency fC for close loop must be selected. The system
crossover frequency is where control loop has unity gain.
The crossover frequency is also called the converter
bandwidth. Generally a higher bandwidth means faster
response to load transient. However, the bandwidth
should not be too high because of system stability
concerns. When designing the compensation loop,
converter stability under all line and load condition must
be considered.
Usually, it is recommended to set the bandwidth to be
less than 1/10 of switching frequency. The AOZ1014
operates at a fixed switching frequency range from
350kHz to 600kHz. The recommended crossover
frequency is less than 30kHz.
fC = 30kHz
The strategy for choosing RC and CC is to set the cross
over frequency with RC and set the compensator zero
with CC. Using selected crossover frequency, fC, to
calculate RC:
RC = fC × V--V---F-O--B-- × -G----2E---π-A----×-×----C-G----OC----S--
where;
fC is the desired crossover frequency,
VFB is 0.8V,
GEA is the error amplifier transconductance, which is 200 x 10-6
A/V, and
GCS is the current sense circuit transconductance, which is
9.02 A/V.
The compensation capacitor CC and resistor RC together
make a zero. This zero is put somewhere close to the
dominate pole, fP1, but lower than 1/5 of the selected
crossover frequency. CC can is selected by:
CC = 2----π-----×-----R1----.C-5----×-----f--P----1-
The previous equation can also be simplified to:
CC
=
C-----O-----×-----R-----L-
RC
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
Table 3 lists the values for a typical output voltage design
when output is 44µF ceramics capacitor.
Table 3.
VOUT
1.8V
3.3V
5V
8V
L1
2.2µH
3.3µH
5.6µH
10µH
RC
51.1kΩ
20kΩ
31.6kΩ
49.9kΩ
CC
1.0nF
1.0nF
1.0nF
1.0nF
Thermal Management and Layout
Consideration
In the AOZ1014 buck regulator circuit, high pulsing cur-
rent flows through two circuit loops. The first loop starts
from the input capacitors, to the VIN pin, to the LX pins, to
the filter inductor, to the output capacitor and load, and
then returns to the input capacitor through ground.
Current flows in the first loop when the high side switch is
on. The second loop starts from inductor, to the output
capacitors and load, to the anode of Schottky diode, to
the cathode of Schottky diode. Current flows in the
second loop when the low side diode is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect input capaci-
tor, output capacitor, and PGND pin of the AOZ1014.
In the AOZ1014 buck regulator circuit, the two major
power dissipating components are the AOZ1014, the
Schottky diode, and output inductor. The total power
dissipation of converter circuit can be measured by input
power minus output power.
Ptotal_loss = VIN × IIN – VO × IO
The power dissipation in Schottky can be approximately
calculated as:
Pdiode_loss = IO × (1 – D) × VFW_Schottky
where;
VFW_Schottky is the Schottky diode forward voltage drop.
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
Pinductor_loss = IO2 × Rinductor × 1.1
Rev. 1.2 October 2009
www.aosmd.com
Page 12 of 19