AOZ1905 Datasheet, PDF (10/16 Pages) Alpha & Omega Semiconductors – EZBoost 2A General Purpose Regulator

AOZ1905
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is recommended to connect input capacitor, output
capacitor, and GND pin of the AOZ1905.
In the AOZ1905 boost regulator circuit, the three major
power dissipating components are the AOZ1905 and
output inductor. The total power dissipation of converter
circuit can be measured by input power minus output
power.
P_{total_loss} = V_IN × I_IN – V_O × I_O
The maximum junction temperature of AOZ1905 is
145°C, which limits the maximum load current capability.
The thermal performance of the AOZ1905 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC
will operate under the recommended environmental
conditions.
Several layout tips are listed below for the best electric
and thermal performance. Figure 2 below illustrates the
PCB layout example as reference.
The power dissipation of inductor can be approximately
calculated by input current and DCR of inductor.
P_{inductor_loss} = I_IN 2 × R_inductor × 1.1
1. Do not use thermal relief connection to the V_IN and
the GND pin. Pour a maximized copper area to the
GND pin and the V_IN pin to help thermal dissipation.
2. A ground plane is preferred.
The power dissipation in the diode can be calculated as:
P_{diode_loss} = I_O × (1 – D) × V_FW
where;
V_FW is the forward voltage drop of the diode.
The actual AOZ1905 junction temperature can be
calculated with power dissipation in the AOZ1905 and
thermal impedance from junction to ambient.
3. Make the current trace from LX pins to L to Co to the
GND as short as possible.
4. Pour copper plane on all unused board area and
connect it to stable DC nodes, like V_IN, GND or
V_OUT.
5. Keep sensitive signal trace such as trace connected
with FB pin and COMP pin far away from the LX pin.
T_junction = (P_{total_loss}–P_{inductor_loss}–P_{diode_loss}) ×
× Θ + T_ambient
(a) MSOP-8
Rev. 1.5 December 2008
Figure 3. AOZ1905 PCB Layout Example
(a) DFN-10 3x3
www.aosmd.com
Page 10 of 16