APL5338 Datasheet, PDF (8/19 Pages) Anpec Electronics Coropration – 2A Bus Termination Regulator

APL5338
Operating Waveforms (Cont.)
(Refer to the section “Typical Application Circuits” V_CNTL=5V, V_IN=V_REF=1.8V, T_A=25^oC)
VTT Load Transient Response
1
V_{TTRE F}
2
V _TT
I_{V TT}
3
I_VTT=-2A (Sink) to 2A (Source) to -2A
CH1: V_TTREF, 50mV/Div, DC
CH2: V_TT, 50mV/Div, DC
CH3: I_VTT, 2A/Div, DC
TIME:100µs/Div
Pin Description
PIN
I/O
NO. NAME
FUNCTION
1
VREF I Reference Voltage Input for VTT and VTTREF Regulator.
2
VIN
I Power Input for VTT and VTTREF Pin. An input capacitor should be connected from VIN to PGND.
3
VTT
O
VTT Output Voltage Pin. Source and sink current up to 2A. To insure the stability issue, the output
capacitor typical 10µF should be connected from VTT to PGND.
4
PGND I/O Power Ground for VIN and VTT.
5 VTTSNS I Voltage Sense for VTT. Connect to the positive node of VTT output capacitors.
6 VTTREF O VTT Reference Output Pin. A small capacitor 0.1µF should be connected from VTTREF to GND.
7
S3
I S3 Signal Input.
8
GND I/O Signal Ground.
9
S5
I S5 Signal Input.
10
VCNTL
I
Power Input for Internal Control Circuitry. A bypass capacitor 0.1µF should be connected near the
pin.
Copyright © ANPEC Electronics Corp.
8
Rev. A.5 - Aug., 2013
www.anpec.com.tw