APA2120 Datasheet, PDF (23/30 Pages) Anpec Electronics Coropration – Stereo 2-W Audio Power Amplifier (with DC_Volume Control)

APA2120/2121
Application Descriptions (Cont.)
Output Coupling Capacitor, Cc (Cont.)
Optimizing Depop Circuitry
For example, a 330µF capacitor with an 8Ω speaker
would attenuate low frequencies below 60.6Hz. The
main disadvantage, from a performance standpoint,
is the load impedance is typically small, which drives
the low-frequency corner higher degrading the bass
response. Large values of C_C are required to pass
low frequencies into the load.
Power Supply Decoupling, Cs
The APA2120/1 provides PV_DD and V_DD two indepen-
dent power inputs for used. PV_DD is used for power
amplifier only and V_DD is used for volume control
amplifier and internal circuit excepting power amplifier.
The APA2120/1 is a high-performance CMOS audio
amplifier that requires adequate power supply
decoupling to ensure the output total harmonic dis-
tortion (THD) is as low as possible. Power supply
decoupling also prevents the oscillations causing by
long lead length between the amplifier and the
speaker. The optimum decoupling is achieved by
using two different type capacitors that target on dif-
ferent type of noise on the power supply leads.
For higher frequency transients, spikes, or digital hash
on the line, a good low equivalent-series-resistance
(ESR) ceramic capacitor, typically 0.1µF placed as
close as possible to the device V and PV lead
DD
DD
works best. For filtering lower-frequency noise
signals, a large aluminum electrolytic capacitor of
10µF or greater placed near the audio power ampli-
fier is recommended.
Circuitry has been included in the APA2120/1 to mini-
mize the amount of popping noise at power-up and
when coming out of shutdown mode. Popping oc-
curs whenever a voltage step is applied to the
speaker. In order to eliminate clicks and pops, all
capacitors must be fully discharged before turn-on.
Rapid on/off switching of the device or the shutdown
function will cause the click and pop circuitry.
The value of Ci will also affect turn-on pops. (Refer
to Effective Bypass Capacitance) The bypass volt-
age ramp up should be slower than input bias voltage.
Although the bypass pin current source cannot be
modified, the size of Cbypass can be changed to al-
ter the device turn-on time and the amount of clicks
and pops. By increasing the value of Cbypass, turn-
on pop can be reduced. However, the tradeoff for
using a larger bypass capacitor is to increase the turn-
on time for this device. There is a linear relationship
between the size of Cbypass and the turn-on time.
In a SE configuration, the output coupling capacitor,
C_C, is of particular concern.
This capacitor discharges through the internal 10kΩ
resistors. Depending on the size of C , the time con-
C
stant can be relatively large. To reduce transients in
SE mode, an external 1kΩ resistor can be placed in
parallel with the internal 10kΩ resistor. The tradeoff
for using this resistor is an increase in quiescent
current. In the most cases, choosing a small value
of Ci in the range of 0.33µF to 1µF, Cb being equal to
4.7µF and an external 1kΩ resistor should be placed
in parallel with the internal 10kΩ resistor should pro-
duce a virtually clickless and popless turn-on.
Copyright  ANPEC Electronics Corp.
23
Rev. A.1 - Mar., 2003
www.anpec.com.tw