APL3555 Datasheet, PDF (13/18 Pages) Anpec Electronics Coropration – USB Power-Distribution Switches

APL3555
Application Information
Input Capacitor
A 1µF or higher ceramic bypass capacitor from VIN to GND,
located near the APL3555, is strongly recommended to
suppress the ringing during short circuit fault event.
When the load current trips the SCP threshold in an over
load condition such as a short circuit, hot plug-in or heavy
load transient the IC immediately turns off the internal
power switch that will cause VIN ringing due to the induc-
tance between power source and VIN. Without the by-
pass capacitor, the output short may cause sufficient ring-
ing on the input to damage internal control circuitry.
Input capacitor is especially important to prevent V_IN from
ringing too high in some applications where the induc-
tance between power source to VIN is large (ex, an extra
bead is added between power source line to VIN for EMI
reduction), additional input capacitance may be needed
on the input to reduce voltage overshoot from exceeding
the absolute maximum voltage of the device during over
load conditions.
Output Capacitor
A low-ESR 10µF aluminum electrolytic or tantalum be-
tween V_OUT and GND is strongly recommended to reduce
the voltage droop during hot-attachment of downstream
peripheral. (Per USB 2.0, output ports must have a mini-
mum 120µF of low-ESR bulk capacitance per hub).
Higher-value output capacitor is better when the output
load is heavy.
Layout Consideration
The PCB layout should be carefully performed to maxi-
mize thermal dissipation and to minimize voltage drop,
droop and EMI. The following guidelines must be
considered:
1. Please place the input capacitors near the VIN pin as
close as possible.
2. Output decoupling capacitors for load must be placed
near the load as close as possible for decoupling high-
frequency ripples.
3. Locate APL3555 and output capacitors near the load to
reduce parasitic resistance and inductance for excel-
lent load transient performance.
4. The negative pins of the input and output capacitors
and the GND pin must be connected to the ground plane
of the load.
5. Keep V_IN and V_OUT traces as wide and short as possible.
Copyright © ANPEC Electronics Corp.
13
Rev. A.1 - Mar., 2016
www.anpec.com.tw