APL5912_09 Datasheet, PDF(12/20 Page) Anpec Electronics Coropration – 0.8V Reference Ultra Low Dropout (0.2V5A) Linear Regulator

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APL5912_09 Datasheet, PDF (12/20 Pages) Anpec Electronics Coropration – 0.8V Reference Ultra Low Dropout (0.2V5A) Linear Regulator

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APL5912

Function Description

Power-On-Reset

A Power-On-Reset (POR) circuit monitors both input volt-

ages at VCNTL and VIN pins to prevent wrong logic

controls. The POR function initiates a soft-start process

after the two supply voltages exceed their rising POR

threshold voltages during powering on. The POR func-

tion also pulls low the POK pin regardless the output

voltage when the VCNTL voltage falls below its falling

POR threshold.

Internal Soft-Start

An internal soft-start function controls rising rate of the

output voltage to limit the current surge at start-up. The

typical soft-start interval is about 2ms.

Output Voltage Regulation

An error amplifier works with a temperature-com-

pensated 0.8V reference and an output NMOS regu-

lates output to the preset voltage. The error ampli-

fier is designed with high bandwidth and DC gain

provides very fast transient response and less load

regulation. It compares the reference with the feed-

back voltage and amplifies the difference to drive

the output NMOS which provides load current from

VIN to VOUT.

Current-Limit

The APL5912 monitors the current via the output NMOS

and limits the maximum current to prevent load and

APL5912 from damages during overload or short-circuit

conditions.

the output again through initiation of a new soft-start cycle

after the junction temperature cools by 50oC, resulting in

a pulsed output during continuous thermal overload

conditions. The thermal shutdown is designed with a

50oC hysteresis to lower the average junction tempera-

ture during continuous thermal overload conditions, ex-

tending lifetime of the device.

For normal operation, device power dissipation should

be externally limited so that junction temperatures will

not exceed +125Â°C.

Enable Control

The APL5912 has a dedicated enable pin (EN). A logic

low signal (VEN< 0.3V) applied to this pin shuts down the

output. Following a shutdown, a logic high signal re-en-

ables the output through initiation of a new soft-start cycle.

Left open, this pin is pulled up by an internal current source

(10ÂµA typical) to enable operation. Itâs not necessary to use

an external transistor to save cost.

Power-OK and Delay

The APL5912 indicates the status of the output voltage by

monitoring the feedback voltage (V ) on FB pin. As the

V rises and reaches the rising Power-OK threshold

(VPOK), an internal delay function starts to perform a delay

time. At the end of the delay time, the IC turns off the

internal NMOS of the POK to indicate the output is OK. As

the VFB falls and reaches the falling Power-OK threshold

(V ), the IC immediately turns on the NMOS of the POK

PNOK

to indicate the output is not OK without a delay time.

Under-Voltage Protection (UVP)

The APL5912 monitors the voltage on FB pin after soft-

start process is finished. Therefore, the UVP is disable

during soft-start. When the voltage on FB pin falls below

the under-voltage threshold, the UVP circuit shuts off the

output immediately. After a while, the APL5912 starts a

new soft-start to regulate output.

Thermal Shutdown

A thermal shutdown circuit limits the junction tempera-

ture of APL5912. When the junction temperature exceeds

+150Â°C, a thermal sensor turns off the output NMOS,

allowing the device to cool down. The regulator regulates

Rev. A.10 - Oct., 2009

www.anpec.com.tw

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