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APW8813 Datasheet, PDF (1/31 Pages) Anpec Electronics Coropration – DDR2 And DDR3 Power Solution Synchronous Buck Controller With 1.5A LDO
APW8813/A
DDR2 And DDR3 Power Solution Synchronous Buck Controller With 1.5A LDO
Features
General Description
Buck Controller (VDDQ)
• High Input Voltages Range from 3V to 28V Input
Power
• Provide 1.8V (DDR2), 1.5V (DDR3) or Adjustable
The APW8813/A integrates a synchronous buck PWM
controller to generate VDDQ, a sourcing and sinking LDO
linear regulator to generate VTT. It provides a complete
power supply for DDR2 and DDR3 memory system. It
Output Voltage from 0.75V to 5.5V
offers the lowest total solution cost in system where space
- ±1% Accuracy Over-Temperature
is at a premium.
• Integrated MOSFET Drivers and Bootstrap Diode The APW8813/A provides excellent transient response
• Excellent Line and Load Transient Responses
and accurate DC voltage output in either PFM or PWM
• PFM Mode for Increased Light Load Efficiency
Mode. In Pulse Frequency Mode (PFM), the APW8813/A
• Constant-On-Time Controller Scheme
provides very high efficiency over light to heavy loads with
loading-modulated switching frequencies. On TQFN4x4-
- Switching Frequency Compensation for PWM
24A package, the Forced PWM Mode works nearly at con-
Mode
stant frequency for low-noise requirements.
- Adjustable Switching Frequency from 100kHz
The APW8813/A is equipped with accurate current-limit,
to 550kHz in PWM Mode with DC Output Current
output under-voltage, and output over-voltage protections.
• Integrated MOSFET Drivers and Bootstrap Diode
A Power-On-Reset function monitors the voltage on V
• S3 and S5 Pins Control The Device in S0, S3, or
prevents wrong operation during power on.
CC
S4/S5 State
The LDO is designed to provide a regulated voltage with
• Power Good Monitoring
bi-directional output current for DDR-SDRAM termination.
• 70% Under-Voltage Protection (UVP)
The device integrates two power transistors to source or
• 125% Over-Voltage Protection (OVP)
• Adjustable Current-Limit Protection
- Using Sense Low-Side MOSFET RDS(ON)
±1.5A LDO Section (VTT)
sink current up to 1.5A. It also incorporates current-limit
and thermal shutdown protection.
The output voltage of LDO tracks the voltage at VTTREF
pin. An internal resistor divider is used to provide a half
voltage of VDDQ for VTTREF and VTT Voltage. The VTT
• Souring or Sinking Current up to 1.5A
output voltage is only requiring 20µF of ceramic output
• Fast Transient Response for Output Voltage
capacitance for stability and fast transient response. The
• Output Ceramic Capacitors Support at Least
S3 and S5 pins provide the sleep state for VTT (S3 state)
10µF MLCC
and suspend state (S4/S5 state) for device, when S5 and
• VTT and VTTREF Track at Half the VDDQSNS by S3 are both pulled low the device provides the soft-off for
VTT and VTTREF.
Internal Divider
The APW8813/A is available in 4mmx4mm 24-pin TQFN
• ±20mV Accuracy for VTT and VTTREF
package, and the APW8813A is available in 3mmx3mm
• Independent Over-Current-Limit (OCL)
20-pin TQFN package.
• Thermal Shutdown Protection
• QFN-24 4mmx4mm Thin Package (TQFN4x4-24A) Applications
for APW8813 and QFN-20 3mmx3mm Thin •
Package (TQFN3x3-20) for APW8813A
DDR2, and DDR3 Memory Power Supplies
• Lead Free and Green Devices Available
• SSTL-2 SSTL-18 and HSTL Termination
(RoHS Compliant)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright © ANPEC Electronics Corp.
1
Rev. A.6 - Sep., 2012
www.anpec.com.tw