56F803 Datasheet, PDF (31/48 Pages) Motorola, Inc – 56F803 16-bit Hybrid Controller

Freescale Semiconductor, Inc.
Serial Peripheral Interface (SPI) Timing
Table 30. SPI Timing¹
Operating Conditions: V_SS = V_SSA = 0 V, V_DD = V_DDA = 3.0–3.6V, T_A = –40° to +85°C, C_L ≤ 50pF, f_OP = 80MHz
Characteristic
Symbol Min
Max
Unit See Figure
Disable time (hold time to high-impedance state)
Slave
Data Valid for outputs
Master
Slave (after enable edge)
Data invalid
Master
Slave
t_D
Figure 23
3.7
15.2
ns
t_DV
Figures 20,
—
4.5
ns
21, 22, 23
—
20.4
ns
t_DI
Figures 20,
0
—
ns
21, 22, 23
0
—
ns
Rise time
Master
Slave
Fall time
Master
Slave
1. Parameters listed are guaranteed by design.
t_R
Figures 20,
—
11.5
ns
21, 22, 23
—
10.0
ns
t_F
Figures 20,
—
9.7
ns
21, 22, 23
—
9.0
ns
SS
(Input)
SCLK (CPOL = 0)
(Output)
SCLK (CPOL = 1)
(Output)
MISO
(Input)
MOSI
(Output)
SS is held High on master
t_C
t_R
t_F
t_CL
t_CH
t_F
t_CL
t_R
t_DH
t_DS
MSB in
t_DI
t_CH
Bits 14–1
t_DV
Master MSB out
t_F
Bits 14–1
LSB in
t_DI(ref)
Master LSB out
t_R
Figure 20. SPI Master Timing (CPHA = 0)
56F803 Technical Data
31
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