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AAT3686_08 Datasheet, PDF (18/23 Pages) Advanced Analogic Technologies – USB Port/AC Adapter Lithium-Ion/Polymer Battery Charger
BatteryManagerTM
PRODUCT DATASHEET
AAT3686
USB Port/AC Adapter Lithium-Ion/Polymer Battery Charger
Data Timing
The system microcontroller should assert an active low
data request pulse for minimum duration of 200ns; this
is specified by the SQPULSE. Upon sensing the rising edge
of the end of the data request pulse, the AAT3686 status
data control will reply the data word back to the system
microcontroller after a delay defined by the data report
time specification TDATA(RPT). The period of the following
group of data pulses will be defined by the TDATA specifi-
cation.
Thermal Considerations
The AAT3686 is offered in a 3x4mm TDFN package and a
4x4mm TDFN package, each of which can provide up to
2.7W of power dissipation when it is properly bonded to
a printed circuit board and has a maximum thermal resis-
tance of 37°C/W. Many considerations should be taken
into account when designing the printed circuit board
layout, as well as the placement of the charger IC pack-
age in proximity to other heat generating devices in a
given application design. The ambient temperature
around the charger IC will also have an effect on the
thermal limits of a battery charging application. The
maximum limits that can be expected for a given ambient
condition can be estimated by the following discussion.
First, the maximum power dissipation for a given situa-
tion should be calculated:
Eq. 1: PD = [(VIN - VBAT) · ICC + (VIN · IOP)]
Where:
PD = Total power dissipation by the device
VIN = Either VADP or VUSB, depending on which mode is
selected
VBAT = Battery voltage as seen at the BAT pin
ICC = Maximum constant fast charge current pro-
grammed for the application
IOP = Quiescent current consumed by the charger IC for
normal operation
Next, the maximum operating ambient temperature for
a given application can be estimated based on the ther-
mal resistance of the 3x4mm and 4x4mm TDFN pack-
ages when sufficiently mounted to a PCB layout and the
internal thermal loop temperature threshold.
Where:
Eq. 2: TA = TJ - (θJA · PD)
TA = Ambient temperature in degrees C
TJ = Maximum device junction temperature below the
thermal loop threshold
PD = Total power dissipation by the device
θJA = Package thermal resistance in °C/W
Timing Diagram
SQ
CK
Data
SQPULSE
System Reset
System Start
TSYNC
TLAT
TDATA(RPT) = TSYNC + TLAT < 2.5 PDATA
TOFF > 2 PDATA
PDATA
N=1
N=2
TOFF
N=3
18
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3686.2007.12.1.11