AAT3183_08 Datasheet, PDF (13/15 Pages) Advanced Analogic Technologies – 300mA Inductorless Step-Down Converter

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PRODUCT DATASHEET
AAT3183
300mA Inductorless Step-Down Converter
L_TRACE
ESL
V_IN
C_IN
ESR
C_FLY
ESL
ESR
AAT3183
I_AC
L_TRACE
ESL
C_OUT
ESR
V_OUT
R_LOAD
GND
Figure 3: AC Parasitic Components of an AAT3183 Typical Application Circuit.
Thermal Performance
Power de-rating of the AAT3183 is not necessary in most
cases due to the low thermal resistance of the SC70JW-8
package, and the limited device losses. Under operating
conditions V_OUT = 1.5V and I_OUT = 300mA, the estimated
worst-case operating efficiency (η) is 68% (V_IN = 4.2V).
η=
P_OUT
P_IN
=
(V_OUT
(V_IN
·
·
I_OUT)
I_IN)
Device power dissipation (P_D) can be estimated:
P_D = P_IN - P_OUT
=
P_OUT
η
- P_OUT
(1 - η)
= V_OUT · I_OUT · _η
(1 - 0.68)
= 1.5V · 0.3A · _0.68
= 211.8mW
The typical junction-to-ambient thermal resistance (R_θJA)
of a SC70JW-8 package mounted on an FR4 board is
160°C/W. The maximum junction temperature (T_J(MAX))
of the device at 85°C ambient is estimated: This is below
the maximum recommended device junction tempera-
ture of 125°C.
T_J(MAX) = T_AMB(MAX) + (P_D · R_θJA)
= 85ºC + (211.8mW · 160°C/W)
= 119°C
PCB Layout Guidelines
Proper circuit board layout will maximize efficiency while
minimizing switching noise and EMI. The following guide-
lines should be observed when designing the printed cir-
cuit board layout for the AAT3183 step-down converter:
1. Place the three external capacitors as close to the
AAT3183 device as possible. Maintain the circuit
board traces as short and wide as possible. This will
minimize noise resulting from parasitic ESR and ESL
in the AC current path.
2. Maintain short and wide traces from ground plane to
circuit nodes. This will minimize stray parasitics.
3. A good example of an optimal layout for the AAT3183
is the AAT3183 evaluation board shown in Figures 4
and 5. The evaluation board schematic is shown in
Figure 6.
3183.2008.02.1.3
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