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AAT4674 Datasheet, PDF (10/13 Pages) Advanced Analogic Technologies – Power Supply Selector Switch
In Equation 1, IMAX is the maximum current required
by the load. RDS(ON)(MAX) is the maximum rated
RDS(ON) of the AAT4674/4674-1 at high tempera-
tures (consult the “RDSON vs. Temperature” perform-
ance graph in the “Typical Characteristics” section
of this datasheet). For estimating the RDS(ON)(MAX)
use the data on the “RDSON vs Temperature” per-
formance graph and increase the value from the
performance graph by 50%. RθJA is the thermal
resistance between the AAT4674/4674-1 and the
printed circuit board (PCB) onto which it is mount-
ed; RθJA is the thermal resistance of the TSOPJW-
12 package. TA(MAX) is the maximum ambient tem-
perature that the PCB under the AAT4674/4674-1
would be if the AAT4674/4674-1 were not dissipat-
ing power. Equation 1 can be rearranged to solve
for IMAX, into Equation 2 (Eq. 2).
Eq. 2: IMAX =
TSD(MIN) - TA(MAX)
R · R DS(ON)(MAX)
ΘJA
TSD(MIN) is the minimum temperature required to
activate the AAT4674/4674-1 over-temperature
protection (thermal shutdown). With typical speci-
fication of 140°C, 125°C is a safe minimum value to
use.
For example, for a 2.5V input power supply appli-
cation that is specified to operate in 50°C environ-
ments where the PCB operates at temperatures as
AAT4674
Power Supply Selector Switch
high as 85°C. The application is sealed and its PCB
is small, causing RθJA to be approximately
160°C/W. The RDS(ON)(MAX) is estimate to be
300mΩ (from the “RDS(ON) vs. Temperature” per-
formance graph, where VIN = 2.5V at 85°C plus
50%). To find the maximum current (IMAX) for this
application use Equation 2:
IMAX =
125°C - 85°C
300mΩ · 160°C/W = 0.913A
PCB Layout Recommendations
For proper thermal management, to minimize PCB
trace resistance, and to take advantage of the low
RDS(ON) values of the two internal power switches in
the AAT4674/4674-1, certain circuit board layout
rules should be followed: IN1, IN2, and OUT should
be routed using wider than normal traces. The two
IN1 pins (1 and 2) and two IN2 pins (3 and 4)
should be connected to the same wide PCB trace;
and GND should be connected to a ground plane.
For best performance, the input capacitors
(CIN1/CIN2) and output capacitors (COUT) should be
placed as close to the package pins as possible.
The AAT4674/4674-1 evaluation board layout fol-
lows the printed circuit board layout recommenda-
tions and can be used as an example of an optimal
board layout.
10
4674.2007.09.1.0