AAT4626_08 Datasheet, PDF (10/15 Pages) Advanced Analogic Technologies – USB Dual-Channel Power Switch

SmartSwitch^TM
Hot-Plug Applications
Application circuit cards with a high inrush current poten-
tial can be limited by use of the AAT4626. The AAT4626
has both slew rate limited turn on characteristics and cur-
rent limit controlled outputs, which make it ideally suited
for power port hot-plug applications. A host power back
plane or hot-plug receptacle may be sensitive to short
duration, high power surges. The AAT4626 will turn on in
a linear ramping fashion and regulate the inrush current
within the specified current limit for the device. The error
flag usually will not be affected during application turn-on
since the 10ms fault flag blanking time is intended for
these types of events. If an application turn-on current
surge exceeds 10ms, an RC delay filter may be added to
the flag output to prevent the system from receiving an
error during the start-up sequence.
PCB Layout Information
In order to obtain the maximum performance from the
AAT4626, very careful attention must be considered in
regard to the printed circuit board layout. In most port
power switch and port protection applications, high volt-
age and current transient events will occur. Proper PCB
layout can help reduce the effects of transient events.
PCB trace resistance will effect overall circuit transient
response; small voltage drops will also be incurred.
PRODUCT DATASHEET
AAT4626
USB Dual-Channel Power Switch
Refer to the following guidelines for power port PCB
layout:
1. PCB traces should be kept as short and direct as pos-
sible to minimize the effects of the PCB on circuit
performance.
2. Make component solder pads large to minimize con-
tact resistance.
3. The AAT4626 output bulk capacitors and ferrite
beads should be placed as close to the device as pos-
sible. PCB traces to the output connector should be
kept as short as possible to minimized trace resis-
tance and the associated voltage drop (I2R loss).
4. If ferrite beads are used in the circuit, select ferrite
beads with a minimum series resistance.
5. The use of PCB trace vias should be avoided on all
traces that conduct high currents. If vias are neces-
sary, make the vias as large as possible and use
multiple vias connected in parallel to minimize their
effect.
Evaluation Board Layout
The AAT4626 evaluation layout follows the recommend
printed circuit board layout procedures and can be used
as an example for good application layouts. (See Figures
4, 5, and 6.) Note that ferrite beads are not used on this
simple device evaluation board. The board layout shown
is not to scale.
Cable / Connector
to Hot-Plug Port
V_BUS
Hot-Plug
Receptacle
V+
C_IN
4.7µF
AAT4626
1
8
ENA OUTA
2
FLGA
7
IN
3
6
FLGB GND
4
5
ENB OUTB
GND
GND
Dual Channel
Inrush Current Protected
Application Card
0.1μF
C_BULKA
(120µF)
Card
Application
Circuit A
C_BULKB
(120µF)
Card
Application
Circuit B
Figure 2: AAT4626 Input Inrush Current Protected Dual Output Application.
10
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4626.2008.02.1.3