ACD2202 Datasheet, PDF (7/24 Pages) ANADIGICS, Inc – CATV/TV/Video Downconverter with Dual Synthesizer

PARAMETER
Table 6: Digital Interface Specifications
(TA = 25 °C, VDD = +5 VDC, ref. Figure 4)
MIN TYP MAX
Logic High Input: VH (pins 10, 11, 12)
2.0
-
-
Logic Low Input: VL (pins 10, 11, 12)
-
-
0.8
Logic Input Current Consumption
(pins 10, 11, 12)
Data to Clock Set Up Time: tCS
-
-
0.01
50
-
-
Data to Clock Hold Time: tCH
10
-
-
Clock Pulse Width High: tCWH
50
-
-
Clock Pulse Width Low: tCWL
50
-
-
Clock to Load Enable Setup Time: tES
50
-
-
Load Enable Pulse Width: tEW
50
-
-
Rise Time: tR
-
10
-
Fall Time: tF
-
10
-
UNIT
V
V
mA
ns
ns
ns
ns
ns
ns
ns
ns
ACD2202
DATA N20: MSB N19
(R20: MSB)
CLOCK
(R19)
N10 N9
R10
(R9)
(R8)
C2 C1: LSB
(C2)
(C1: LSB)
LE
OR
tCS
tCH
LE
tCWL
tES
tCWH
tEW
Figure 4: Serial Data Input Timing
Data Sheet - Rev 2.1
7
12/2003