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| AWT4502S10 Datasheet, PDF (3/8 Pages) ANADIGICS, Inc – TX Power MMIC | |||
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AWT4502 Fixture Schematic
AWT4502S10
VREF
VDDC
TS2
AWT4502
VSS = -3.0 VDC
VDDC = +3.1 VDC
VBC = 1.2 to 3.0 VDC
VD1, VD2, VD3 = 3.5 VDC
Pin
Signal Description
1
VD1
Drain of the 1st stage (+3.5V)
2
RFIN
RF power input, DC blocked
3*
VREF
Part of biasing control circuit should be set to get IDQ of
140mA
4
VDDC
Bias circuit supply (+3.1V)
5
GND
RF and DC Ground
6
8
9
10, 15
VTS2
VSS
VD2
GND
Dynamic Bias Resistor
Negative supply (-3V)
Drain of the 2nd stage (+3.5V)
RF and DC ground
11, 12, 13, 14
16
VD3/RFOUT
VG3
Drain of 3rd stage (+3.5V) and RFOUT
Gate of 1st stage (bias indication and tuning)
*This voltage is being adjusted to get IDQ of 140mA, the voltage range is 1.2-3V.
3
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