ARA2017_12 Datasheet, PDF (13/17 Pages) ANADIGICS, Inc – Programmable Gain Amplifier

ARA2017
LOGIC PROGRAMMING
Programming Instructions
The programming word is set through a 10 bit shift
register via the data, clock and enable lines. The
data is entered in order with the most significant bit
(MSB) first and the least significant bit (LSB) last. The
enable line must be low for the duration of the data
entry, then set high to latch the shift register. The
rising edge of the clock pulse shifts each data value
into the register.
Table 6: Programming Register
DATA BIT
9
8
7
6
5
4
3
2
1
0
FUNCTION
Current
Gain
Notes:
(1) Refer to Application Information section for Current and Gain bit settings.
(2) Data bit 0 should always be set to “1”.
(3) Data bit 1 is reserved for future use, and should be set to “0”.
0
1
Figure 18: Serial Data Input Timing
13
DATA SHEET - Rev 2.1
11/2012