AWL9924 Datasheet, PDF (1/20 Pages) ANADIGICS, Inc – 2.4/5 GHz 802.11a/b/g WLAN Power Amplifier

FEATURES
• 3.8% EVM @ POUT = +19 dBm with IEEE
802.11a 64 QAM OFDM at 54 Mbps
• 3% EVM @ POUT = +20 dBm with IEEE 802.11g
64 QAM OFDM at 54 Mbps
• -40 dBc 1st Sidelobe, -55 dBc 2nd sidelobe
ACPR at +23 dBm with IEEE 802.11b CCK/
DSSS Gaussian Filtering at 1 Mbps
• 32 dB of Linear Power Gain at 2.4 GHz
• 35 dB of Linear Power Gain at 5 GHz
• Single +3.3 V Supply
• Dual Temperature-Compensated Linear Power
Detectors
• 4 mm x 4 mm x 0.9 mm LPCC Lead-Free
RoHS-Compliant Package
• 50 Ω - Matched RF Ports
• >1 kV ESD Rating (HBM)
• MSL 2 Rating
AWL9924
2.4/5 GHz 802.11a/b/g
WLAN Power Amplifier
PRELIMINARY DATA SHEET - Rev 1.3
S34 Package
24 Pin 4 mm x 4 mm x 0.9 mm
LPCC
APPLICATIONS
• 802.11a/b/g WLAN
PRODUCT DESCRIPTION
The ANADIGICS AWL9924 dual band power
amplifier is a high performance InGaP HBT power
amplifier IC designed for transmit applications in
the 2.4-2.5 GHz and 4.9-5.9 GHz band. Matched to
50 Ω at all RF inputs and outputs, the part requires
no additional RF matching components off-chip,
making the AWL9924 the world’s simplest dual band
PA IC implementation available. The PA exhibits
unparalleled linearity and efficiency for IEEE
802.11g, 802.11b and 802.11a WLAN systems
under the toughest signal configurations within
these standards.
The power detectors are temperature compensated
on chip, enabling separate single-ended output
voltages for each band with excellent accuracy over
a wide range of operating temperatures. The PA is
biased by a single +3.3 V supply and consumes
ultra-low current in the OFF mode.
The AWL9924 is manufactured using advanced
InGaP HBT technology that offers state-of-the-art
reliability, temperature stability and ruggedness. The
IC is provided in a 4 mm x 4 mm x 0.9 mm LPCC
package optimized for a 50 Ω system.
VPC 2G 1
DETP 2G 2
RF IN 2G 3
RF IN 5G 4
DETP 5G 5
VPC 5G 6
24
23
22
21
20
19
Bias
Bias
Bias
Input
Match
Bias Control
2.4 GHz PA
5 GHz PA
Bias Control
Output
Match
Power
Detector
Power
Detector
Input
Match
Output
Match
Bias
Bias
Bias
18 GND
17 NC
16 DET OUT 2G
15 DET OUT 5G
14 NC
13 GND
7
8
9
10
11
12
Figure 1: Block Diagram and Pinout
02/2006