AS3722 Datasheet, PDF (163/198 Pages) –

AS3722 − Register Description
Addr:77h
InterruptMask4
Bit
Bit Name
Default Access
Bit Description
6
occur_alarm_sd6_int_m
1
RW
0 : Interrupt enabled
1 : Interrupt masked (disabled)
7
adc_int_m
1
RW
0 : Interrupt enabled
1 : Interrupt masked (disabled)
Figure 192:
InterruptStatus1
Addr:78h
InterruptStatus1
Bit
Bit Name
Default Access
Bit Description
7
LowBat_int_i
0
SS_RC Bit is set when VSUP drops below vres_fall
6
ovtmp_int_i
5
onkey_int_i
0
SS_RC
Bit is set when 110deg is exceeded on main or
subdies
0
SS_RC Rising and falling edge
Bit is set at ONkey longpress interrupt (rising
4
onkey_lpress_int_i
0
SS_RC
edge)
Reading out that register resets the ONkey
longreset timer
3 occur_alarm_sd0_int_i
0
SS_RC Rising edge only
2
enable1_int_i
1
acok_int_i
0
lid_int_i
0
SS_RC Rising and falling edge
0
SS_RC Rising and falling edge
0
SS_RC Rising and falling edge
ams Datasheet
[v1-01] 2015-Sep-07
Page 163
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