AS3910 Datasheet, PDF (13/47 Pages) ams AG – 13.56 MHz RFID Reader IC, ISO-14443 A/B

AS3910
Data Sheet - Application Information
8 Application Information
8.1 Operating Modes
The AS3910 operating mode is defined by the content of the Operation Control Register (address #01).
At power up, all bits of the Operation Control Register are set to 0 and the AS3910 is in Power-down mode. In this mode – the AFE static power
consumption is minimized, only the POR and part of bias are active, regulators are transparent and are not operating. The SPI is still functional
in this mode; so all settings of ISO mode definition and configuration registers can be done.
Control bit en (bit 7 of Operation Control Register) is controlling both the oscillator and regulators. When this bit is set, the device enters in Ready
mode. In this mode, the oscillator and regulators are enabled. An interrupt is sent to inform the microcontroller when the oscillator frequency is
stable. Another possibility to enter in Ready mode is to assert EN pin high (logic OR function between bit en and pin EN).
Enable of Receiver and Transmitter are separated, so it is possible to operate one without switching on the other (control bits rx_en and tx_en).
In some cases this may be useful, in case the reader field has to be maintained and there is no transponder response expected receiver can be
switched-off to save current. Another example is NFCIP target mode in which RF field is generated by the initiator and only Receiver operates.
The receiver also has a low power mode in which its power consumption and as consequence sensitivity are reduced. This mode is entered in by
setting control bit rx_lp.
The last control bit of the Operation Control Register is nfc_t bit. Setting of this bit is only allowed in case the NFC mode is set in the ISO mode
definition register. Setting this bit to one, while all other Operation Control Register bits are set to 0, puts the AS3910 into Initial NFC Target
mode. In this low power mode, only the Target Activation Detector, which will detect a presence of external RF field, is active. Once the presence
of external RF field is detected, an interrupt is sent to microcontroller which will in turn switch on oscillator and receiver.
8.2 Transmitter
The Transmitter contains two identical driver blocks which are driving external antenna connected to pins RFO1 and RFO2. The driver is
composed of 8 segments having binary weighted output resistance. The MSB segment typical ON resistance is 3Ω; when all segments are
turned on, the output resistance is typically 1.5Ω. Usually certain segments are switched off to define AM modulated level, while they are all
turned on to define the non-modulated level. It is also possible to switch off certain segments when driving the non modulated level to reduce the
amplitude of signal on the antenna and/or to reduce the antenna Q factor.
The driver impedance in increased in case of AM modulation (ISO-14443B), in case of OOK modulation (ISO-14443A) both drivers are blocked
to low state. In the single driver mode (bit sing of configuration register 2 set to 1) only RFO1 output is driven, RFO2 output is disabled.
AM modulation and operation of the driver segments is controlled by writing AM modulation depth and antenna driver registers (see AM
Modulation Depth and Antenna Driver Registers on page 32). Register #13 defines which segments will be used to define normal, non-
modulated level. The default setting is that all segments are used. Registers #10 to #12 are used to define how the AM modulated level is set-up.
It can be set-up automatically by definition of modulation depth and the direct command Calibrate Modulation Depth or by a direct definition of
segments which are turned off during AM modulation.
8.3 Receiver
The receiver performs demodulation of the transponder subcarrier modulation which is superimposed on the 13.56 MHz carrier frequency. It
performs AM or PM demodulation, band-pass filtering and digitalization of subcarrier signals, 848, 424 and 212 kHz subcarrier frequencies are
supported. Additionally, it performs RSSI measurement, automatic gain control (AGC) and Squelch function.
The receiver is switched on when Operation Control Register bit rx_en is set. The operation of the receiver is additionally controlled by the signal
rx_on which is set high when modulated signal is expected on the receiver input. This is automatically done after every Transmit command.
Signal rx_on can be also forced high by sending direct command Unmask Receive Data. Signal rx_on is used to control features like RSSI and
AGC.
AM demodulation is performed using a peak follower. Both the positive and negative peaks are tracked to suppress common mode signal. In
case external demodulation is carried out the peak follower stage can be bypassed by setting bit envi in Configuration Register 2. In case of PM
demodulation signal coming from the phase detector is replacing the output of peak follower.
Next stage in signal processing is the buffer amplifier followed by second order low pass filter with adjustable corner frequency. Final stage is a
first order high pass filter with adjustable corner frequency. The digital signal representing transponder subcarrier modulation is produced by a
window comparator.
Filter setting is done automatically when ISO mode and data rate are chosen by writing ISO Mode Definition Register. Setting is displayed in the
Receiver Configuration Register (#06) and can be changed by rewriting this register. In transparent mode ISO mode register is not used and
Filter selection has to be done by writing Receiver Configuration register (#06).
By setting the Operation Control Register bit rx_lp receiver operates in low power mode. In this mode, power consumption is lower but as
consequence also receiver sensitivity is reduced (see Electrical Characteristics on page 8).
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