DL82 Datasheet, PDF (1/2 Pages) ams AG – CUB - 0.6 um CMOS

R
Austria Mikro Systeme International
DL82
CUB
0.6 µm CMOS
DL82 is a transparent D-latch with 2x drive strength. The Q output follows the D input
when GN is low. The Q output is independent of D when GN is high and retains the
value of D just prior to the rising edge on GN.
Truth Table
D GN Q QN
LL LH
HL H L
X H no change
D
Q
DL82
GN QN
Capacitance
Ci (pF)
D
0.013
GN 0.023
Area
0.95 mils²
Power
4.61 µW / MHz
Delay [ns] = tpd.. = f(SL, L)
Output Slope [ns] = op_sl.. = f(L)
with SL = Input Slope [ns] ; L = Output Load [pF]
with L = Output Load [pF]
AC Characteristics : Tj = 25°C VDD = 3.3V Typical Process
AC Characteristics
Characteristics
Symbol
Delay D to Q
Delay D to QN
Delay GN to Q
Delay GN to QN
Output Slope D to Q
Output Slope D to QN
Output Slope GN to Q
Output Slope GN to QN
tpddqr
tpddqf
tpddqnr
tpddqnf
tpdgnqr
tpdgnqf
tpdgnqnr
tpdgnqnf
op_sldqr
op_sldqf
op_sldqnr
op_sldqnf
op_slgnqr
op_slgnqf
op_slgnqnr
op_slgnqnf
SL = 0.1
L = 0.2 L = 1.4 L = 2.0
1.02 2.48 3.19
1.27 2.59 3.16
1.72 3.10 3.75
1.47 2.62 3.17
1.25 2.71 3.41
1.57 2.89 3.46
2.04 3.43 4.13
1.71 2.86 3.45
1.07 5.30 7.32
1.01 4.05 5.30
1.01 5.13 7.25
0.78 3.78 5.45
1.03 5.13 7.50
0.98 4.01 5.32
1.00 5.15 7.25
0.76 3.81 5.42
SL = 2.0
L = 0.2 L = 1.4 L = 2.0
1.11 2.57 3.26
1.45 2.76 3.33
1.89 3.27 3.91
1.57 2.71 3.26
1.55 3.01 3.71
1.86 3.19 3.76
2.34 3.72 4.44
2.02 3.17 3.73
1.08 5.27 7.28
1.00 4.02 5.32
0.96 5.18 7.20
0.78 3.77 5.41
1.05 5.28 7.33
1.00 3.98 5.73
1.00 5.11 7.38
0.75 3.80 5.50
Sept. 1996
- 140 -
Rev. N/C