FCBGA Datasheet, PDF (1/2 Pages) Amkor Technology – Package sizes from 10 mm to 55 mm (60 mm and 65 mm in development)

Data Sheet
LAMINATE
FCBGA
Flip Chip BGA Packages (FCBGA)
Flip chip interconnect utilizes array interconnect of die to
substrate as a replacement for conventional wire bonding.
This allows the entire die surface to be used for electrical
connections to the substrate, exponentially increasing the
I/O per unit area vs. perimeter interconnect technologies.
Using flip chip interconnect improves package electrical
performance by removing the high inductance wires and
replacing them with low inductance solder connections. Flip
chip interconnect also allows highly parallel, direct
connection with on-die power planes, which enables
performance at lower operating voltages.
Amkor FCBGA packages are assembled around
state‑of‑the‑art, single unit laminate or ceramic substrates.
Utilizing multiple high density routing layers, laser drilled
blind, buried, and stacked vias, and ultra fine line/space
metallization, FCBGA substrates have the highest routing
density available. By combining flip chip interconnect with
ultra advanced substrate technology, FCBGA packages can
be electrically tuned for maximum electrical performance.
Once the electrical function is defined, the design flexibility
enabled by flip chip also allows for significant options in
final package design. Amkor offers FCBGA packaging in a
variety of product formats to fit a wide range of end
application requirements.
Applications
This IC packaging technology is applicable for high pincount
and/or high performance ASICs. Large body FCBGAs
provide package solutions for the demands of internet,
workstation processors and high bandwidth system
communication devices. By incorporating flip chip
interconnect technology, packages supporting thousands of
connections are enabled in conventional surface mount
package sizes. FCBGAs are also the package of choice for
gaming system processors and graphics, as well as
high‑end applications processors for leading-edge portable
devices.
Features
• Die sizes up to 26 mm
• Package sizes from 10 mm to 55 mm (60 mm and 65 mm in development)
• 0.4 mm, 0.5 mm, 0.65 mm, 0.8 mm and 1.0 mm pitch BGA footprints
• 130 µm minimum array bump pitch
• < 100 µm minimum peripheral bump pitch
Technology Options
• Substrates
– 4-16 layer laminate build up substrates
– High CTE ceramic
– LTCC alumina ceramic
– Coreless
• Bump Types
– Eutectic Sn/Pb
– High Pb
– Pb Free
– Cu pillar (array and fine pitch peripheral)
• Package Formats
– Bare die
– Lidded
Thermal Solutions
The variety of FCBGA package options allows package selection to be
tailored to the specific thermal needs of the end product. High performance
ASIC products typically utilize a lidded format that features a controlled
bondline die attach direct to a copper heat spreader. This feature produces
the lowest possible thermal resistance (Theta JC) between the package and
any externally applied thermal solution. The copper heat spreader effectively
spreads heat laterally away from the die to the package perimeter and into
the motherboard.
Lower wattage products generally utilize bare die or molded configurations.
In these cases, the flip chip construction, with solder bumps and core vias,
provides a lower resistance path from the active side of the die through the
substrate, allowing heat dissipation both from the package surface and into
the motherboard.
Visit Amkor Technology online for locations and
to view the most current product information.
DS831C
Rev Date: 9/15
Questions? Contact us: [e-mail]