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A25L040_15 Datasheet, PDF (26/39 Pages) AMIC Technology – 4Mbit Low Voltage, Serial Flash Memory
Figure 20. Release from Deep Power-down (RES) Instruction Sequence
A25L040 Series
S
tRES1
01 2 3 45 6 7
C
Instruction
DIO
High Impedance
DO
Deep Power-down Mode Stand-by Mode
Driving Chip Select ( S ) High after the 8-bit instruction byte
has been received by the device, but before the whole of the
8-bit Electronic Signature has been transmitted for the first
time (as shown in Figure 20.), still insures that the device is
put into Stand-by Power mode. If the device was not pre-
viously in the Deep Power-down mode, the transition to the
Stand-by Power mode is immediate. If the device was
previously in the Deep Power-down mode, though, the
transition to the Stand-by Power mode is delayed by tRES1,
and Chip Select ( S ) must remain High for at least tRES1 (max),
as specified in AC Characteristics Table. Once in the
Stand-by Power mode, the device waits to be selected, so
that it can receive, decode and execute instructions.
(October, 2010, Version 1.2)
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AMIC Technology Corp.