A25L80P Datasheet, PDF (24/34 Pages) AMIC Technology – 8 Mbit, Low Voltage, Serial Flash Memory With 50 MHz SPI Bus Interface

Figure 17-2. Power-Down and Voltage Drop
V_CC
V_CC(max)
V_CC(min)
No Device Access Allowed
t_PU
Device Access Allowed
A25L80P
V_CC(low)
t_PD
time
Table 6. Power-Up Timing and VWI Threshold
Symbol
Parameter
t_VSL1
t_PUW1
V_WI1
V_CC(min) to ^S low
Time delay to Write instruction
Write Inhibit Voltage
Note: 1. These parameters are characterized only.
Min.
Max.
Unit
10
µs
1
10
ms
1
2
V
INITIAL DELIVERY STATE
The device is delivered with the memory array erased: all bits are set to 1 (each byte contains FFh). The Status Register contains
00h (all Status Register bits are 0).
PRELIMINARY (May 2005, Version 0.0)
23
AMIC Technology Corp.