A42L8316 Datasheet, PDF (2/25 Pages) AMIC Technology – 256K X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE

A42L8316 Series
Preliminary
256K X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE
Features
n Organization: 262,144 words X 16 bits
n Part Identification
- A42L8316 (512 Ref.)
n Single 3.3V power supply/built-in VBB generator
n Low power consumption
- Operating: 110mA (-30 max)
- Standby: 2.5mA (TTL), 1.5mA (CMOS)
1.0mA (Self-refresh current)
n High speed
- 30/35/40 ns RAS access time
- 16/17/18 ns column address access time
- 9/10/11 ns CAS access time
- 14/16/18 ns EDO Page Mode Cycle Time
General Description
The A42L8316 is a new generation randomly accessed
memory for graphics, organized in a 262,144-word by 16-
bit configuration. This product can execute Byte Write
and Byte Read operation via two CAS pins.
The A42L8316 offers an accelerated Fast Page Mode
Pin Configuration
nSOJ
n TSOP
VCC 1
I/O0
2
I/O1
3
I/O2
4
I/O3
5
VCC 6
I/O4
7
I/O5
8
I/O6
9
I/O7
10
NC 11
NC 12
WE 13
RAS 14
NC 15
A0 16
A1 17
A2 18
A3 19
VCC 20
40
VSS
39
I/O15
38
I/O14
37
I/O13
36
I/O12
35
VSS
34
I/O11
33
I/O10
32
I/O9
31
I/O8
30
NC
29
LCAS
28
UCAS
27
OE
26
A8
25
A7
24
A6
23
A5
22
A4
21
VSS
VCC 1
I/O0
2
I/O1
3
I/O2
4
I/O3
5
VCC 6
I/O4
7
I/O5
8
I/O6
9
I/O7
10
NC 13
NC 14
WE 15
RAS 16
NC 17
A0 18
A1 19
A2 20
A3 21
VCC 22
44 VSS
43
I/O15
42
I/O14
41
I/O13
40
I/O12
39 VSS
38
I/O11
37
I/O10
36
I/O9
35
I/O8
32 NC
31 LCAS
30 UCAS
29
OE
28
A8
27 A7
26 A6
25 A5
24 A4
23 VSS
n Industrial operating temperature range: -40°C to 85°C
for -U
n Fast Page Mode with Extended Data Out
n Separate CAS ( UCAS , LCAS ) for byte selection
n 512 Refresh Cycle in 8ms
n Read-modify-write, RAS -only, CAS -before- RAS ,
Hidden refresh capability
n TTL-compatible, three-state I/O
n JEDEC standard packages
- 400mil, 40-pin SOJ
- 400mil, 40/44 TSOP type II package
This allow random access of up to 512 words within a row
at a 71/62/55 MHz EDO cycle, making the A42L8316
ideally suited for graphics, digital signal processing and
high performance computing systems.
Pin Descriptions
Symbol
A0 – A8
I/O0 - I/O15
RAS
LCAS
UCAS
WE
OE
VCC
VSS
NC
Description
Address Inputs
Data Input/Output
Row Address Strobe
Column Address Strobe for Lower Byte
(I/O0 – I/O7)
Column Address Strobe for Upper Byte
(I/O8 – I/O15)
Write Enable
Output Enable
3.3V Power Supply
Ground
No Connection
cycle with a feature called Extended Data Out (EDO).
PRELIMINARY (August, 2002, Version 0.1)
1
AMIC Technology, Inc.