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| A29L400A Datasheet, PDF (15/38 Pages) AMIC Technology – 512K X 8 Bit / 256K X 16 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory | |||
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A29L400A Series
Table 5. A29L400A Command Definitions
Command
Sequence
(Note 1)
Read (Note 6)
Reset (Note 7)
Manufacturer ID
Device ID,
Top Boot Block
Device ID,
Bottom Boot Block
1
1
Word
Byte 4
Word
Byte 4
Word
Byte 4
First
Addr Data
RA RD
XXX F0
555
AAA AA
555
AA
AAA
555 AA
AAA
Bus Cycles (Notes 2 - 5)
Second
Third
Fourth
Fifth
Addr Data Addr Data Addr Data Addr Data
2AA
555 55
2AA
55
555
2AA 55
555
555
AAA 90
555
90
AAA
555 90
AAA
X00 37
X01 B334
X02 34
X01 B3B5
X02 B5
Sixth
Addr Data
Continuation ID
Word 4 555 AA
Byte
AAA
Word
555
Sector Protect Verify
(Note 9)
4
AA
Byte
AAA
Program
Word
Byte 4
Unlock Bypass
Word
Byte 3
Unlock Bypass Program (Note 10) 2
Unlock Bypass Reset (Note 11) 2
Chip Erase
Word
Byte 6
Sector Erase
Word
Byte 6
Erase Suspend (Note 12)
1
Erase Resume (Note 13)
1
555
AA
AAA
555
AAA AA
XXX A0
XXX 90
555
AA
AAA
555
AAA AA
XXX B0
XXX 30
2AA 55
555
2AA
55
555
555 90
AAA
555
90
AAA
2AA
55
555
555
A0
AAA
2AA
555 55
555
AAA 20
PA PD
XXX 00
2AA
55
555
555
80
AAA
2AA
555
555
55
80
AAA
X03
7F
X06
(SA) XX00
X02 XX01
(SA) 00
X04 01
PA PD
555
2AA
AA
55
AAA
555
555
2AA
AA
55
AAA
555
555
10
AAA
SA 30
Legend:
X = Don't care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE or CE pulse,
whichever happens later.
PD = Data to be programmed at location PA. Data latches on the rising edge of WE or CE pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A17 - A12 select a unique sector.
Note:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Except when reading array or autoselect data, all bus cycles are write operation.
4. Data bits I/O15~I/O8 are donât care for unlock and command cycles.
5. Address bits A17 - A11 are don't cares for unlock and command cycles, unless SA or PA required.
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when device is in the autoselect mode, or if I/O5 goes high
(while the device is providing status data).
8. The fourth cycle of the autoselect command sequence is a read cycle.
9. The data is 00h for an unprotected sector and 01h for a protected sector. See âAutoselect Command Sequenceâ for more information.
10. The Unlock Bypass command is required prior to the Unlock Bypass Program command.
11. The Unlock Bypass Reset command is required to return to reading array data when the device is in the unlock bypass mode.
12. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode.
13. The Erase Resume command is valid only during the Erase Suspend mode.
PRELIMINARY (July, 2005, Version 0.0)
14
AMIC Technology, Corp.
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