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LP62E16512-T_15 Datasheet, PDF (14/14 Pages) AMIC Technology – 512K X 16 BIT LOW VOLTAGE CMOS SRAM
Package Information
48LD CSP ( 8 x 10 mm ) Outline Dimensions
(48TFBGA)
TOP VIEW
Ball*A1 CORNER
123456
A
B
C
D
E
F
G
H
SIDE VIEW
LP62E16512-T Series
unit: mm
BOTTOM VIEW
Ball#A1 CORNER
0.10 S C
0.25 S C A B
b (48X)
654321
A
B
C
D
E
F
G
H
B
e
D1
A
D
0.20(4X)
C SEATING PLANE
Dimensions in mm
Symbol
MIN. NOM. MAX.
Notes:
A
---
--- 1.20
A1
0.20 0.25 0.30
A2
0.48 0.53 0.58
D
7.90 8.00 8.10
E
9.90 10.00 10.10
D1
--- 3.75 ---
E1
--- 5.25 ---
e
--- 0.75 ---
b
0.30 0.35 0.40
1. THE BALL DIAMETER, BALL PITCH, STAND-OFF & PACKAGE THICKNESS
ARE DIFFERENT FROM JEDEC SPEC MO192 (LOW PROFILE BGA FAMILY).
2. PRIMARY DATUM C AND SEATING PLANE ARE DEFINED BY THE SPHERICAL CROWNS
OF THE SOLDER BALLS.
3. DIMENSION b IS MEASURED AT THE MAXIMUM.
4. THERE SHALL BE A MINIMUM CLEARANCE OF 0.25mm BETWEEN THE EDGE OF THE
SOLDER BALL AND THE BODY EDGE.
5. BALL PAD OPENING OF SUBSTRATE IS Φ 0.3mm (SMD)
SUGGEST TO DESIGN THE PCB LAND SIZE AS Φ 0.3mm (NSMD)
(August, 2004, Version 1.1)
13
AMIC Technology, Corp.