A25L080_15 Datasheet, PDF (14/40 Pages) AMIC Technology – 8Mbit Low Voltage, Serial Flash Memory

Read Data Bytes (READ)
The device is first selected by driving Chip Select ( ^S ) Low.
The instruction code for the Read Data Bytes (READ)
instruction is followed by a 3-byte address (A23-A0), each bit
being latched-in during the rising edge of Serial Clock (C).
Then the memory contents, at that address, is shifted out on
Serial Data Output (DO), each bit being shifted out, at a
maximum frequency f_R, during the falling edge of Serial Clock
(C).
The instruction sequence is shown in Figure 8. The first byte
addressed can be at any location. The address is
automatically incremented to the next higher address after
each byte of data is shifted out. The whole memory can,
A25L080 Series
therefore, be read with a single Read Data Bytes (READ)
instruction. When the highest address is reached, the
address counter rolls over to 000000h, allowing the read
sequence to be continued indefinitely.
The Read Data Bytes (READ) instruction is terminated by
driving Chip Select ( ^S ) High. Chip Select ( ^S ) can be driven
High at any time during data output. Any Read Data Bytes
(READ) instruction, while an Erase, Program or Write cycle is
in progress, is rejected without having any effects on the
cycle that is in progress.
Figure 8. Read Data Bytes (READ) Instruction Sequence and Data-Out Sequence
S
0 1 2 3 4 5 6 7 8 9 10 28 29 30 31 32 33 34 35 36 37 38 39
C
Instruction
24-Bit Address
DIO
23 22 21 3 2 1 0
MSB
High Impedance
DO
Data Out 1
Data Out 2
76543210 7
MSB
Note: Address bits A23 to A20 are Don’t Care, for A25L080.
(March, 2012, Version 1.6)
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AMIC Technology Corp.