AMIS-710400 Datasheet, PDF (5/7 Pages) AMI SEMICONDUCTOR – 400dpi CIS Module

AMIS-710400-A4: 400dpi CIS Module
8.0 Switching Characteristics (25^°C)
Data Sheet
Figure 3: Module Timing Diagram
The switching characteristics (at 25°C) for the I/O clocks are shown in Figure 3. For the timing symbol definitions see Table 6.
Table 6: Timing Symbol's Definition and Timing Values
Item
Symbol
Min.
Typ.
Max.
Units
Clock cycle time
to
0.20
2.0
µs
Clock pulse width
tw
50
ns
Clock duty cycle
25
Prohibit crossing time of SP⁽¹⁾
tprh
0
75
%
ns
Data setup time
tds
20
ns
Data hold time
tdh
0
ns
Signal delay time
tdl
20
ns
Signal settling time
tsh
100
ns
Note:
"Prohibit crossing of start pulse" is to indicate that the start pulse should not be active high between any two consecutive high going clock pulses or two consecutive low going
clock pulses (see Figure 3). Only one high going clock under the active high start pulse initiates the internal shift register, and it must not be active over two high going clocks.
All low going clock pulses will not initiate the shift register, but to ensure that the start pulse will not be actively high during two consecutive high going clocks, the circuit should
be designed to keep the start pulse active only for one low going clock cycle.
AMI Semiconductor – July 06, M-20587-001
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