AME5287 Datasheet, PDF (9/20 Pages) Analog Microelectronics – Rectified Step-Down Converter

AME
AME5287
3A, 300KHz ~ 2MHz Synchronous
Rectified Step-Down Converter
Where C_OUT is the output capacitor, R_L is load resis-
tance; ESR_COUT is the equivalent series resistance of
output capacitor.
The compensation design is to shape the converter close
loop transfer function to get desired gain and phase. For
most cases, a series capacitor and resistor network con-
nected to the COMP pin sets the pole-zero and is ad-
equate for a stable high-bandwidth control loop.
In the AME5287, FB pin and COMP pin are the invert-
ing input and the output of internal transconductance er-
ror amplifier (EA). A series R₃ and C₁ compensation net-
work connected to COMP pin provides one pole and one
zero: for R₃<<A_EA/GEA,
f_P2
=
2π
1
×C_{1} R₃
+
A_EA
G_EA

≈
2π
G_EA
×C₁ ×
A_EA
f_Z2
=
2π
1
×C₁ ×
R₃
where G_EA is the error amplifier transconductance
A_EA is the error amplifier voltage gain
R₃ is the compensation resistor
C₁ is the compensation capacitor
The desired crossover frequency f_c of the system is
defined to be the frequency where the control loop has
unity gain. It is also called the bandwidth of the con-
verter. In general, a higher bandwidth means faster re-
sponse to load transient. However, the bandwidth should
not be too high because of system stability concern. When
designing the compensation loop, converter stability un-
der all line and load condition must be considered. Usu-
ally, it is recommended to set the bandwidth to be less
than 1/10 of switching frequency. Using selected cross-
over frequency, f_C, to calculate R₃:
R₃
=
f_C
× ^VOUT
V_FB
× ^{2π × COUT}
G_EA × G_CS
Where G_CS is the current sense circuit transconductance.
The compensation capacitor C₁ and resistor R₃ together
make zero. This zero is put somewhere close to the pole
f_P1 of selected frequency. C₁ is selected by:
C₁
=
C_OUT ×
R₃
R_L
Checking Transient Response
The regulator loop response can be checked by look-
ing at the load transient response. Switching regulators
take several cycles to respond to a step in load current.
When a load step occurs, V_OUT immediately shifts by an
amount equal to (∆I_LOAD X ESR), where ESR is the effec-
tive series resistance of C_OUT. ∆I_LOAD also begins to charge
or discharge C_OUT, which generates a feedback error sig-
nal.
The regulator loop then acts to return V_OUT to its
steadystate value. During this recovery time V_OUT can be
monitored for overshoot or ringing that would indicate a
stability problem.
Efficiency Considerations
Although all dissipative elements in the circuit produce
losses, one major source usually account for most of the
losses in AME5287 circuits: I²R losses. The I²R loss
dominates the efficiency loss at medium to high load cur-
rents.
The I²R losses are calculated from the resistances of
the internal switches, R_SW, and external inductor R_L. In
continuous mode, the average output current flowing
through inductor L is "chopped" between the main switch
and the synchronous switch. Thus the series resistance
looking into the SW pin is a function of both top and bot-
tom MOSFET R_DS(ON) and the duty cycle (D) as follows:
R_SW = (R_DS(ON)TOP)(D) + (R_DS(ON)BOTTOM)(1-D)
The R_DS(ON) for both the top and bottom MOSFETs can
be obtained from Electrical Characteristics table. Thus,
to obtained I²R losses, simply add R_SW to R_L and multiply
the result by the square of the average output current.
Rev. A.01
9