AME5283 Datasheet, PDF (9/20 Pages) Analog Microelectronics – Rectified Step-Down Converter

AME
AME5283
2A, 300KHz ~ 2MHz Synchronous
Rectified Step-Down Converter
Loop Compensation
The AME5283 employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output LC
filter. It greatly simplifies the compensation loop design.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in frequency domain. The pole can be calculated by:
f _P1
=
2π
1
× C_OUT
×
R_L
The zero is a ESR zero due to output capacitor and its
ESR. It can be calculated by:
f_Z1
=
2π
1
× C_OUT × ESR_COUT
Where C_OUT is the output capacitor, R_L is load resis-
tance;
ESR_COUT is the equivalent series resistance of output
capacitor.
The compensation design is to shape the converter close
loop transfer function to get desired gain and phase. For
most cases, a series capacitor and resistor network con-
nected to the COMP pin sets the pole-zero and is ad-
equate for a stable high-bandwidth control loop.
In the AME5283, FB pin and COMP pin are the invert-
ing input and the output of internal transconductance er-
ror amplifier (EA). A series RC and CC compensation
network connected to COMP pin provides one pole and
one zero: for R_C << A_EA/G_EA
f_P2
=
2π
×C_C
× R_C +
1
A_EA
G_EA

≈
2π
G_EA
×C_C ×
A_EA
f_Z2
=
2π
1
×C_C
×
R_C
Rev. A.03
Where G_EA is the error amplifier transconductance
A_EA is the error amplifier voltage gain
R_C is the compensation resistor
C_C is the compensation capacitor
The desired crossover frequency f_C of the system is
defined to be the frequency where the control loop has
unity gain. It is also called the bandwidth of the con-
verter. In general, a higher bandwidth means faster re-
sponse to load transient. However, the bandwidth should
not be too high because of system stability concern. When
designing the compensation loop, converter stability un-
der all line and load condition must be considered. Usu-
ally, it is recommended to set the bandwidth to be less
than 1/10 of switching frequency. Using selected cross-
over frequency, f_C, to calculate R_C:
R_C
=
f_C
×
V_OUT
V_FB
× ^{2π × COUT}
G_EA × G_CS
Where G_CS is the current sense circuit
transconductance. The compensation capacitor C_C and
resistor R_C together make zero. This zero is put some-
where close to the pole f_P1 of selected frequency. C_C is
selected by:
C_C
=
C_OUT × R_L
R_C
Checking Transient Response
The regulator loop response can be checked by look-
ing at the load transient response. Switching regulators
take several cycles to respond to a step in load current.
When a load step occurs, V_OUT immediately shifts by an
amount equal to (∆I_LOAD x ESR), where ESR is the effec-
tive series resistance of C_OUT. ∆I_LOAD also begins to charge
or discharge C_OUT, which generates a feedback error sig-
nal.
The regulator loop then acts to return V_OUT to its steady
state value. During this recovery time V_OUT can be moni-
tored for overshoot or ringing that would indicate a stabil-
ity problem.
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