AME5235 Datasheet, PDF (8/15 Pages) Analog Microelectronics – 40V 3.5A Buck Converter

AME
AME5235
Where G_EA is the error amplifier transconducductance.
The system has one zero of importance, due to the com-
pensation capacitor (C4) and the compensation resistor
(R3). This zero is located at:
f_Z1
=
2×π
1
×C4×
R3
The system may have another zero of importance, if
the output capacitor has a large capacitance and/or a high
ESR value. The zero, due to the ESR and capacitance of
the output capacitor, is located at:
f _ESR
=
2×π
1
× C 2 × R_ESR
In this case, a third pole set by the second compensa-
tion capacitor (C5) and the compensation resistor (R3) is
used to compensate the effect of the ESR zero on the
loop gain. This pole is located at:
f_P3
=
2×π
1
×C5×
R3
The goal of compensation design is to shape the con-
verter transfer function to get a desired loop gain. The
system crossover frequency where the feedback loop has
the unity gain is important. Lower crossover frequencies
result in slower line and load transient responses, while
higher crossover frequencies could cause system insta-
bility. A good standard is to set the crossover frequency
below one-tenth of the switching frequency. To optimize
the compensation components, the following procedure
can be used.
1. Choose the compensation resistor (R3) to set the
desired crossover frequency.
Determine R3 by the following equation:
R3 = ^{2 × C2 × fc} × ^Vout < ^{2 × C2 × 0.1× fc} × ^Vout
G_EA × G_CS V_FB
G_EA × G_CS
V_FB
Where f_C is the desired crossover frequency which is
typically below one tenth of the switching frequency.
8
40V 3.5A Buck Converter
2. Choose the compensation capacitor (C4) to achieve
the desired phase margin. For applications with typical
inductor values, setting the compensation zero (f_Z1) be-
low one-forth of the crossover frequency provides suffi-
cient phase margin.
Determine C4 by the floolwing equation:
C4
>
2×π
4
× R3×
f_c
Where R3 is the compensation resistor.
3. Determine if the second compensation capacitor (C5)
is required. It is required if the ESR zero of the output
capacitor is located at less than half of the switching
frequency, or the following relationship is valid:
1
2 ×π × C2 × R_ESR
<
f_s
2
If this is the case, then add the second compensation
capacitor (C5) to set the pole f_P3 at the location of the
ESR zero. Determine C5 by the equation:
C5 = ^{C 2 × RESR}
R3
Rev. A.02