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| AM49DL32XBG Datasheet, PDF (60/64 Pages) SPANSION – Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous | |||
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PRELIMINARY
FLASH ERASE AND PROGRAMMING PERFORMANCE
Parameter
Typ (Note 1) Max (Note 2) Unit
Comments
Sector Erase Time
Chip Erase Time
0.4
5
sec
Excludes 00h programming
28
sec
prior to erasure (Note 4)
Byte Program Time
5
150
µs
Accelerated Byte/Word Program Time
Word Program Time
Chip Program Time
(Note 3)
Byte Mode
Word Mode
4
120
µs
7
210
µs
Excludes system level
overhead (Note 5)
21
63
sec
14
42
Notes:
1. Typical program and erase times assume the following conditions: 25°C, 3.0 V VCC, 1,000,000 cycles. Additionally,
programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90°C, VCC = 2.7 V, 1,000,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum program times listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table
12 for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 1,000,000 cycles.
LATCHUP CHARACTERISTICS
Description
Min
Input voltage with respect to VSS on all pins except I/O pins
(including A9, OE#, and RESET#)
â1.0 V
Input voltage with respect to VSS on all I/O pins
â1.0 V
VCC Current
â100 mA
Note: Includes all pins except VCC. Test conditions: VCC = 3.0 V, one pin at a time.
PACKAGE PIN CAPACITANCE
Parameter
Symbol
Parameter Description
CIN
Input Capacitance
COUT
Output Capacitance
CIN2
Control Pin Capacitance
CIN3
WP#/ACC Pin Capacitance
Notes:
1. Sampled, not 100% tested.
2. Test conditions TA = 25°C, f = 1.0 MHz.
Test Setup
VIN = 0
VOUT = 0
VIN = 0
VIN = 0
Max
12.5 V
VCC + 1.0 V
+100 mA
Typ Max Unit
11
14
pF
12
16
pF
14
16
pF
17
20
pF
FLASH DATA RETENTION
Parameter Description
Minimum Pattern Data Retention Time
Test Conditions
150°C
125°C
Min
Unit
10
Years
20
Years
July 19, 2002
Am49DL32xBG
59
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