AMD-751 Datasheet, PDF (5/14 Pages) Advanced Micro Devices – AMD-751-TM System Controller Revision Guide

22564B-1—February 2000
Preliminary Information
AMD-751™ System Controller Revision Guide
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Product Errata
This section documents AMD-751 system controller product errata. A unique tracking number for each
erratum has been assigned within this document for user convenience in tracking the errata within
specific revision levels. Table 2 cross-references the revisions of the processor to each erratum. An “X”
indicates that the erratum applies to the revision. The absence of an “X” indicates that the erratum
does not apply to the revision.
Note: There can be missing errata numbers. Errata that have been resolved from early revisions of the
controller have been deleted, and errata that have been reconsidered may have been deleted or
renumbered.
Table 2. Cross-Reference of Product Revision to Errata
Erratum Number and Description
PCI
1 Invalid Read Performed After a Slave PCI Target Abort
2 Arbitration Latency Due to No Bus Preemption
3 PCI ARB_DIS Bit Set When DMA is Active
AGP
8 GART Requestors Do Not Work With TLB Caches Off
18 Burst Writes to Non-Existent AGP Memory Hang System
20 AGP AD_STB[1:0] Strobe Glitch with Nvidia NV10-Based (GeForce) Cards
SDRAM
19 Setting the Queue Bypass-Mode Bit Causes Memory Failure
21 Potential Memory Failure When Using Certain Double-Sided SDRAM Memory DIMMs
AMD Athlon™ System Bus
12 Incomplete AMD Athlon System Bus Disconnect Causes AMD-751 To Hang
Functional
14 BAR0[3] Initial Setting Causes OS/2 Warp Install Error
15 Ref_5V Cannot Be At A Lower Voltage Than Vcc (3.3V)
Revision
Number
C3 C5
XX
X
XX
XX
XX
XX
X
XX
XX
XX
X
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